u-boot-brain/arch/x86/cpu/coreboot/Kconfig
Simon Glass 77dd7c6854 x86: timer: use a timer base of 0
On x86 platforms the timer is reset to 0 when the SoC is reset. Having
this as the timer base is useful since it provides an indication of how
long it takes before U-Boot is running.

When U-Boot sets the timer base to something else, time is lost and we
no-longer have an accurate account of the time since reset. This
particularly affects bootstage.

Change the default to not read the timer base, leaving it at 0. Add an
option for when U-Boot is the secondary bootloader.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:09 +08:00

30 lines
447 B
Plaintext

if TARGET_COREBOOT
config SYS_COREBOOT
bool
default y
imply SYS_NS16550
imply SCSI
imply SCSI_AHCI
imply AHCI_PCI
imply MMC
imply MMC_PCI
imply MMC_SDHCI
imply MMC_SDHCI_SDMA
imply USB
imply USB_EHCI_HCD
imply USB_XHCI_HCD
imply USB_STORAGE
imply USB_KEYBOARD
imply VIDEO_COREBOOT
imply E1000
imply ETH_DESIGNWARE
imply PCH_GBE
imply RTL8169
imply CMD_CBFS
imply FS_CBFS
imply CBMEM_CONSOLE
imply X86_TSC_READ_BASE
endif