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https://github.com/brain-hackers/u-boot-brain
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![Ladislav Michl](/assets/img/avatar_default.png)
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of get_timer. Changes since original version: * Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to improve timer resolution. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
206 lines
6.6 KiB
C
206 lines
6.6 KiB
C
/*
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* (C) Copyright 2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
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#define CONFIG_OMAP_SX1 1 /* a SX1 Board */
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/* input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* Hardware drivers
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*/
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
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#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */
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/*
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* USB device configuration
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*/
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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#define CONFIG_USBD_VENDORID 0x1234
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#define CONFIG_USBD_PRODUCTID 0x5678
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#define CONFIG_USBD_MANUFACTURER "Siemens"
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#define CONFIG_USBD_PRODUCT_NAME "SX1"
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/*
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* I2C configuration
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*/
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_DRIVER_OMAP1510_I2C
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_I2C
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#undef CONFIG_CMD_NET
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#include <configs/omap1510.h>
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#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
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#ifdef CONFIG_STDOUT_USBTTY
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#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty"
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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* V1
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* PHYS_FLASH_SIZE_1 (16 << 10) 16 MB
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* PHYS_FLASH_SIZE_2 (8 << 10) 8 MB
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* V2 only 1 flash
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* PHYS_FLASH_SIZE_1 (32 << 10) 32 MB
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
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#define CONFIG_SYS_MAX_FLASH_SECT (256) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, PHYS_FLASH_2 }
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/*-----------------------------------------------------------------------
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* FLASH driver setup
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*/
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */
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#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_SIZE_REDUND 0x20000
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#define CONFIG_ENV_OFFSET_REDUND 0x40000
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#endif /* __CONFIG_H */
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