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https://github.com/brain-hackers/u-boot-brain
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ee5931d488
This adds information about the Gateworks System Controller to the gsc command such as the firmware version, firmware CRC and status of the GSC watchdog (if its enabled and if its tripped). Additionally the 'gsc wd' command can be used to enable or disable the watchdog with the following usage: gsc wd enable [30|60] gsc wd disable Note that the GSC registers are battery-backed by the GSC coincell so once eanbled, they remain enabled across power-cycles or until either the GSC firmware has been updated or FLASH has been re-programmed by the Gateworks JTAG adapter. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
/*
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* Copyright (C) 2013 Gateworks Corporation
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*
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* Author: Tim Harvey <tharvey@gateworks.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASSEMBLY__
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/* i2c slave addresses */
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#define GSC_SC_ADDR 0x20
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#define GSC_RTC_ADDR 0x68
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#define GSC_HWMON_ADDR 0x29
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#define GSC_EEPROM_ADDR 0x51
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/* System Controller registers */
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enum {
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GSC_SC_CTRL0 = 0x00,
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GSC_SC_CTRL1 = 0x01,
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GSC_SC_STATUS = 0x0a,
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GSC_SC_FWCRC = 0x0c,
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GSC_SC_FWVER = 0x0e,
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};
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/* System Controller Control1 bits */
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enum {
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GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
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GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
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GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
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};
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/* System Controller Interrupt bits */
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enum {
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GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
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GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
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GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
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GSC_SC_IRQ_GPIO = 4, /* GPIO change */
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GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
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GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
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GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
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};
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/* Hardware Monitor registers */
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enum {
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GSC_HWMON_TEMP = 0x00,
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GSC_HWMON_VIN = 0x02,
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GSC_HWMON_VDD_3P3 = 0x05,
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GSC_HWMON_VBATT = 0x08,
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GSC_HWMON_VDD_5P0 = 0x0b,
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GSC_HWMON_VDD_CORE = 0x0e,
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GSC_HWMON_VDD_HIGH = 0x14,
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GSC_HWMON_VDD_DDR = 0x17,
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GSC_HWMON_VDD_SOC = 0x11,
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GSC_HWMON_VDD_1P8 = 0x1d,
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GSC_HWMON_VDD_IO2 = 0x20,
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GSC_HWMON_VDD_2P5 = 0x23,
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GSC_HWMON_VDD_IO3 = 0x26,
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GSC_HWMON_VDD_IO4 = 0x29,
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};
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/*
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* I2C transactions to the GSC are done via these functions which
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* perform retries in the case of a busy GSC NAK'ing the transaction
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*/
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int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
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int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
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int gsc_info(int verbose);
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#endif
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