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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-24 02:48:51 +09:00
![Stefan Roese](/assets/img/avatar_default.png)
This patch removes the x86 architecture specific GD flags (GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S. But the coreboot target does not use start16.S at all and boots directly from the 32-bit start code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
128 lines
2.9 KiB
ArmAsm
128 lines
2.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* U-Boot - x86 Startup Code
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*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002,2003
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*/
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#include <asm/global_data.h>
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#include <asm/processor-flags.h>
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#define BOOT_SEG 0xffff0000 /* linear segment of boot code */
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#define a32 .byte 0x67;
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#define o32 .byte 0x66;
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.section .start16, "ax"
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.code16
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.globl start16
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start16:
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/* Save BIST */
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movl %eax, %ecx
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xorl %eax, %eax
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movl %eax, %cr3 /* Invalidate TLB */
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/* Turn off cache (this might require a 486-class CPU) */
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movl %cr0, %eax
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orl $(X86_CR0_NW | X86_CR0_CD), %eax
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movl %eax, %cr0
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wbinvd
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/* load the temporary Global Descriptor Table */
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o32 cs lidt idt_ptr
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o32 cs lgdt gdt_ptr
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/* Now, we enter protected mode */
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movl %cr0, %eax
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orl $X86_CR0_PE, %eax
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movl %eax, %cr0
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/* Flush the prefetch queue */
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jmp ff
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ff:
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/* Finally restore BIST and jump to the 32-bit initialization code */
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movw $code32start, %ax
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movw %ax, %bp
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movl %ecx, %eax
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o32 cs ljmp *(%bp)
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/* 48-bit far pointer */
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code32start:
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.long _start /* offset */
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.word 0x10 /* segment */
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idt_ptr:
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.word 0 /* limit */
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.long 0 /* base */
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/*
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* The following Global Descriptor Table is just enough to get us into
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* 'Flat Protected Mode' - It will be discarded as soon as the final
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* GDT is setup in a safe location in RAM
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*/
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gdt_ptr:
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.word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
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.long BOOT_SEG + gdt_rom /* base */
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/* Some CPUs are picky about GDT alignment... */
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.align 16
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.globl gdt_rom
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gdt_rom:
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/*
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* The GDT table ...
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*
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* Selector Type
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* 0x00 NULL
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* 0x08 Unused
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* 0x10 32bit code
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* 0x18 32bit data/stack
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*/
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/* The NULL Desciptor - Mandatory */
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.word 0x0000 /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x00 /* access */
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.byte 0x00 /* flags + limit_high */
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.byte 0x00 /* base_high */
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/* Unused Desciptor - (matches Linux) */
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.word 0x0000 /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x00 /* access */
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.byte 0x00 /* flags + limit_high */
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.byte 0x00 /* base_high */
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/*
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* The Code Segment Descriptor:
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* - Base = 0x00000000
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* - Size = 4GB
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* - Access = Present, Ring 0, Exec (Code), Readable
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* - Flags = 4kB Granularity, 32-bit
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*/
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.word 0xffff /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x9b /* access */
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.byte 0xcf /* flags + limit_high */
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.byte 0x00 /* base_high */
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/*
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* The Data Segment Descriptor:
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* - Base = 0x00000000
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* - Size = 4GB
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* - Access = Present, Ring 0, Non-Exec (Data), Writable
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* - Flags = 4kB Granularity, 32-bit
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*/
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.word 0xffff /* limit_low */
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.word 0x0000 /* base_low */
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.byte 0x00 /* base_middle */
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.byte 0x93 /* access */
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.byte 0xcf /* flags + limit_high */
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.byte 0x00 /* base_high */
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