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![]() ARM supported speeds and init value of core_pll for SDP1200 are programmed wrong as part for the device speed cleanups. Fixing it here. Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection") Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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board_k2e.c | ||
board_k2hk.c | ||
board_k2l.c | ||
board.c | ||
board.h | ||
ddr3_cfg.c | ||
ddr3_cfg.h | ||
ddr3_k2e.c | ||
ddr3_k2hk.c | ||
ddr3_k2l.c | ||
Kconfig | ||
MAINTAINERS | ||
Makefile | ||
README |
U-Boot port for Texas Instruments Keystone II EVM boards ======================================================== Author: Murali Karicheri <m-karicheri2@ti.com> This README has information on the u-boot port for K2HK, K2E, and K2L EVM boards. Documentation for this board can be found at http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html https://www.einfochips.com/index.php/partnerships/texas-instruments/k2l-evm.html The K2HK board is based on Texas Instruments Keystone2 family of SoCs: K2H, K2K. More details on these SoCs are available at company websites K2K: http://www.ti.com/product/tci6638k2k K2H: http://www.ti.com/product/tci6638k2h The K2E SoC details are available at http://www.ti.com/lit/ds/symlink/66ak2e05.pdf The K2L SoC details are available at http://www.ti.com/lit/ds/symlink/tci6630k2l.pdf Board configuration: ==================== Some of the peripherals that are configured by u-boot +------+-------+-------+-----------+-----------+-------+-------+----+ | |DDR3 |NAND |MSM SRAM |ETH ports |UART |I2C |SPI | +------+-------+-------+-----------+-----------+-------+-------+----+ |K2HK |2 |512MB |6MB |4(2) |2 |3 |3 | |K2E |4 |512MB |2MB |8(2) |2 |3 |3 | |K2L |2 |512MB |2MB |4(2) |4 |3 |3 | +------+-------+-------+-----------+-----------+-------+-------+----+ There are only 2 eth port installed on the boards. There are separate PLLs to drive clocks to Tetris ARM and Peripherals. To bring up SMP Linux on this board, there is a boot monitor code that will be installed in MSMC SRAM. There is command available to install this image from u-boot. The port related files can be found at following folders keystone2 SoC related files: arch/arm/cpu/armv7/keystone/ EVMs board files: board/ti/k2s_evm/ Board configuration files: include/configs/k2hk_evm.h include/configs/k2e_evm.h include/configs/k2l_evm.h As u-boot is migrating to Kconfig there is also board defconfig files configs/k2e_evm_defconfig configs/k2hk_evm_defconfig configs/k2l_evm_defconfig Supported boot modes: - SPI NOR boot - AEMIF NAND boot - UART boot Supported image formats: - u-boot.bin: for loading and running u-boot.bin through Texas instruments code composure studio (CCS) and for UART boot. - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot - MLO: gpimage for programming AEMIF NAND flash for NAND boot Build instructions: =================== Examples for k2hk, for k2e and k2l just replace k2hk prefix accordingly. Don't forget to add ARCH=arm and CROSS_COMPILE. To build u-boot.bin, u-boot-spi.gph, MLO: >make k2hk_evm_defconfig >make Load and Run U-Boot on keystone EVMs using CCS ========================================= Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin on EVM. See instructions at below link for installing CCS on a Windows PC. http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started# Installing_Code_Composer_Studio Use u-boot.bin from the build folder for loading and running u-boot binary on EVM. Follow instructions at K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup K2E http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup K2L http://processors.wiki.ti.com/index.php/TCIEVMK2L_Hardware_Setup to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode" and Power ON the EVM. Follow instructions to connect serial port of EVM to PC and start TeraTerm or Hyper Terminal. Start CCS on a Windows machine and Launch Target configuration as instructed at http://processors.wiki.ti.com/index.php/ MCSDK_UG_Chapter_Exploring#Loading_and_Running_U-Boot_on_EVM_through_CCS. The instructions provided in the above link uses a script for loading the u-boot binary on the target EVM. Instead do the following:- 1. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D is connected: Unknown)" at the debug window (This is created once Target configuration is launched) and select "Connect Target". 2. Once target connect is successful, choose Tools->Load Memory option from the top level menu. At the Load Memory window, choose the file u-boot.bin through "Browse" button and click "next >" button. In the next window, enter Start address as 0xc001000, choose Type-size "32 bits" and click "Finish" button. 3. Click View -> Registers from the top level menu to view registers window. 4. From Registers, window expand "Core Registers" to view PC. Edit PC value to be 0xc001000. From the "Run" top level menu, select "Free Run" 5. The U-Boot prompt is shown at the Tera Term/ Hyper terminal console as below and type any key to stop autoboot as instructed := U-Boot 2014.04-rc1-00201-gc215b5a (Mar 21 2014 - 12:47:59) I2C: ready Detected SO-DIMM [SQR-SD3T-2G1333SED] DRAM: 1.1 GiB NAND: 512 MiB Net: K2HK_EMAC Warning: K2HK_EMAC using MAC address from net device , K2HK_EMAC1, K2HK_EMAC2, K2HK_EMAC3 Hit any key to stop autoboot: 0 SPI NOR Flash programming instructions ====================================== U-Boot image can be flashed to first 512KB of the NOR flash using following instructions: 1. Start CCS and run U-boot as described above. 2. Suspend Target. Select Run -> Suspend from top level menu CortexA15_1 (Free Running)" 3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000 through CCS as described in step 2 of "Load and Run U-Boot on K2HK/K2E/K2L EVM using CCS", but using address 0x87000000. 4. Free Run the target as described earlier (step 4) to get u-boot prompt 5. At the U-Boot console type following to setup u-boot environment variables. setenv addr_uboot 0x87000000 setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000> run burn_uboot_spi Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch to "SPI Little Endian Boot mode" as per instruction at http://processors.wiki.ti.com/index.php/*_Hardware_Setup. 6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash. AEMIF NAND Flash programming instructions ====================================== U-Boot image can be flashed to first 1024KB of the NAND flash using following instructions: 1. Start CCS and run U-boot as described above. 2. Suspend Target. Select Run -> Suspend from top level menu CortexA15_1 (Free Running)" 3. Load MLO binary from build folder on to DDR address 0x87000000 through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM using CCS", but using address 0x87000000. 4. Free Run the target as described earlier (step 4) to get u-boot prompt 5. At the U-Boot console type following to setup u-boot environment variables. setenv filesize <size in hex of MLO rounded to hex 0x10000> run burn_uboot_nand Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch to "ARM NAND Boot mode" as per instruction at http://processors.wiki.ti.com/index.php/*_Hardware_Setup. 6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash. Load and Run U-Boot on keystone EVMs using UART download ======================================================== Open BMC and regular UART terminals. 1. On the regular UART port start xmodem transfer of the u-boot.bin 2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM BMC> bootmode #4 MBC> reboot 3. When xmodem is complete you should see the u-boot starts on the UART port