Simon Glass 9c678e152a x86: dts: Add microcode updates for ivybridge CPU ... Add two microcode updates that are provided for this CPU. The updates have been converted to a device tree form. Note: SPDX submission has been done. If this license is approved I will convert the files to use SPDX. Signed-off-by: Simon Glass <sjg@chromium.org>		2014-11-21 07:34:14 +01:00
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cpu	x86: ivybridge: Perform Intel microcode update on boot	2014-11-21 07:34:14 +01:00
dts	x86: dts: Add microcode updates for ivybridge CPU	2014-11-21 07:34:14 +01:00
include/asm	x86: ivybridge: Perform Intel microcode update on boot	2014-11-21 07:34:14 +01:00
lib	x86: Allow timer calibration to work on ivybridge	2014-11-21 07:24:12 +01:00
config.mk	x86: Remove REALMODE_BASE which is no longer used	2014-11-21 07:24:08 +01:00
Kconfig	x86: chromebook_link: Implement CAR support (cache as RAM)	2014-11-21 07:34:11 +01:00