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https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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| .. | ||
| dcu.c | ||
| Kconfig | ||
| ls102xa_pbi.cfg | ||
| ls102xa_rcw_sd.cfg | ||
| ls1021aiot.c | ||
| MAINTAINERS | ||
| Makefile | ||
| psci.S | ||
| README | ||
Overview -------- The LS1021A-IOT is a Freescale reference board that hosts the LS1021A SoC. LS1021AIOT board Overview ------------------------- - DDR Controller - Supports 1GB un-buffered DDR3L SDRAM discrete devices(32-bit bus) with 4 bit ECC - DDR power supplies 1.35V to all devices with automatic tracking of VTT - Soldered DDR chip - Supprot one fixed speed - Ethernet - Two on-board SGMII 10/100/1G ethernet ports - One Gbit Etherent RGMII interface to 4-ports switch with 4x 10/100/1000 RJ145 ports - CPLD - 8-bit registers in CPLD for system configuration - connected to IFC_AD[0:7] - Power Supplies - 12V@5A DC - SDHC - SDHC port connects directly to a full 8-bit SD/MMC slot - Support for SDIO devices - USB - Two on-board USB 3.0 - One on-board USB k22 - PCIe - Two MiniPCIe Solts - SATA - Support SATA Connector - AUDIO - AUDIO in and out - I/O Expansion - Arduino Shield Connector - Port0 - CAN/GPIO/Flextimer - Port1 - GPIO/CPLD Expansion - Port2 - SPI/I2C/UART Memory map ----------- The addresses in brackets are physical addresses. Start Address End Address Description Size 0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB 0x00_4000_0000 0x00_43FF_FFFF QSPI(Chip select 0) 64MB 0x00_4400_0000 0x00_47FF_FFFF QSPI(Chip select 1) 64MB 0x00_6000_0000 0x00_6000_FFFF CPLD 64K 0x00_8000_0000 0x00_BFFF_FFFF DDR 1GB Boot description ----------------- LS1021A-IOT support two ways of boot: Qspi boot and SD boot The board doesn't support boot from another source without changing any switch/jumper.