Bin Meng d402f922b2 x86: queensbay: Correct Topcliff device irqs ... There are 4 usb ports on the Intel Crown Bay board, 2 of which are connected to Topcliff usb host 0 and the other 2 connected to usb host 1. USB devices inserted in the ports connected to usb host 1 cannot get detected due to wrong IRQ assigned to the controller. Actually we need apply the PCI interrupt pin swizzling logic to all devices on the Topcliff chipset when configuring the PIRQ routing. This was observed on usb ports, but device 6 and 10 irqs are also wrong. Correct them all together. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>		2015-07-14 18:03:16 -06:00
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include	Makefile: Support include files for .dts files	2014-06-20 11:55:03 -06:00
microcode	x86: Add support for Intel Minnowboard Max	2015-02-06 12:07:39 -07:00
.gitignore	dts: generate multiple device tree blobs	2014-02-19 11:10:05 -05:00
chromebook_link.dts	x86: link: Add PCH driver to support SPI Flash	2015-04-29 18:51:50 -06:00
chromebox_panther.dts	x86: Add support for panther (Asus Chromebox)	2015-04-16 19:27:40 -06:00
crownbay.dts	x86: queensbay: Correct Topcliff device irqs	2015-07-14 18:03:16 -06:00
galileo.dts	x86: quark: Implement PIRQ routing	2015-06-04 02:39:39 -06:00
Makefile	x86: qemu: Create separate i440fx and q35 device trees	2015-06-04 03:03:18 -06:00
minnowmax.dts	x86: gpio: add pinctrl support from the device tree	2015-06-04 03:32:08 -06:00
qemu-x86_i440fx.dts	x86: qemu: Implement PIRQ routing	2015-06-04 03:03:18 -06:00
qemu-x86_q35.dts	x86: qemu: Implement PIRQ routing	2015-06-04 03:03:18 -06:00
rtc.dtsi	x86: crownbay: Enable DM RTC support	2015-07-14 18:03:16 -06:00
serial.dtsi	x86: Add support for Intel Minnowboard Max	2015-02-06 12:07:39 -07:00
skeleton.dtsi	x86: fdt: Create basic .dtsi file for coreboot	2012-12-06 14:30:42 -08:00