mirror of
https://github.com/brain-hackers/u-boot-brain
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17cb4b8f32
These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
65 lines
1.3 KiB
C
65 lines
1.3 KiB
C
/*
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* Genericish driver for memory mapped NAND devices
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*
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* Copyright (c) 2006-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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*/
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/* Your board must implement the following macros:
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* NAND_PLAT_WRITE_CMD(chip, cmd)
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* NAND_PLAT_WRITE_ADR(chip, cmd)
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* NAND_PLAT_INIT()
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*
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* It may also implement the following:
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* NAND_PLAT_DEV_READY(chip)
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*/
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#include <common.h>
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#include <asm/io.h>
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#ifdef NAND_PLAT_GPIO_DEV_READY
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# include <asm/gpio.h>
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# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY)
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#endif
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#include <nand.h>
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static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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NAND_PLAT_WRITE_CMD(this, cmd);
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else
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NAND_PLAT_WRITE_ADR(this, cmd);
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}
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#ifdef NAND_PLAT_DEV_READY
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static int plat_dev_ready(struct mtd_info *mtd)
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{
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return NAND_PLAT_DEV_READY((struct nand_chip *)mtd_to_nand(mtd));
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}
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#else
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# define plat_dev_ready NULL
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#endif
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int board_nand_init(struct nand_chip *nand)
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{
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#ifdef NAND_PLAT_GPIO_DEV_READY
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gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat");
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gpio_direction_input(NAND_PLAT_GPIO_DEV_READY);
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#endif
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#ifdef NAND_PLAT_INIT
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NAND_PLAT_INIT();
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#endif
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nand->cmd_ctrl = plat_cmd_ctrl;
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nand->dev_ready = plat_dev_ready;
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nand->ecc.mode = NAND_ECC_SOFT;
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return 0;
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}
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