mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-29 08:00:26 +09:00
08db5d5c71
This change makes stm32mp1 clock driver to get the root clocks reference from the device node in the FDT rather than fetching straight these clocks by their name. Driver now stores the clock reference and use it to know if a root clock is present, get its rate or gets its related udevice reference. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> |
||
---|---|---|
.. | ||
altera | ||
analogbits | ||
aspeed | ||
at91 | ||
exynos | ||
imx | ||
intel | ||
kendryte | ||
mediatek | ||
meson | ||
microchip | ||
mtmips | ||
mvebu | ||
owl | ||
renesas | ||
rockchip | ||
sifive | ||
sunxi | ||
tegra | ||
ti | ||
uniphier | ||
clk_bcm6345.c | ||
clk_boston.c | ||
clk_fixed_factor.c | ||
clk_fixed_rate.c | ||
clk_octeon.c | ||
clk_pic32.c | ||
clk_sandbox_ccf.c | ||
clk_sandbox_test.c | ||
clk_sandbox.c | ||
clk_scmi.c | ||
clk_stm32f.c | ||
clk_stm32h7.c | ||
clk_stm32mp1.c | ||
clk_versal.c | ||
clk_vexpress_osc.c | ||
clk_zynq.c | ||
clk_zynqmp.c | ||
clk-cdce9xx.c | ||
clk-composite.c | ||
clk-divider.c | ||
clk-fixed-factor.c | ||
clk-gate.c | ||
clk-hsdk-cgu.c | ||
clk-mux.c | ||
clk-uclass.c | ||
clk.c | ||
ics8n3qv01.c | ||
Kconfig | ||
Makefile | ||
mpc83xx_clk.c | ||
mpc83xx_clk.h |