mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-10 14:53:26 +09:00
fbd6295da4
am335x supports various sysclk frequencies which can be determined using sysboot pins. PLLs should be configures based on this sysclk frequency. Add PLL configurations for all supported frequencies. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/*
|
|
* sys_proto.h
|
|
*
|
|
* System information header
|
|
*
|
|
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef _SYS_PROTO_H_
|
|
#define _SYS_PROTO_H_
|
|
#include <linux/mtd/omap_gpmc.h>
|
|
#include <asm/arch/cpu.h>
|
|
|
|
u32 get_cpu_rev(void);
|
|
u32 get_sysboot_value(void);
|
|
|
|
extern struct ctrl_stat *cstat;
|
|
u32 get_device_type(void);
|
|
void save_omap_boot_params(void);
|
|
void setup_early_clocks(void);
|
|
void setup_clocks_for_console(void);
|
|
void mpu_pll_config_val(int mpull_m);
|
|
void ddr_pll_config(unsigned int ddrpll_M);
|
|
|
|
void sdelay(unsigned long);
|
|
|
|
void gpmc_init(void);
|
|
void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs, u32 base,
|
|
u32 size);
|
|
int omap_nand_switch_ecc(uint32_t, uint32_t);
|
|
|
|
void set_uart_mux_conf(void);
|
|
void set_mux_conf_regs(void);
|
|
void sdram_init(void);
|
|
u32 wait_on_value(u32, u32, void *, u32);
|
|
#ifdef CONFIG_NOR_BOOT
|
|
void enable_norboot_pin_mux(void);
|
|
#endif
|
|
void am33xx_spl_board_init(void);
|
|
int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev);
|
|
int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency);
|
|
#endif
|
|
|
|
void enable_usb_clocks(int index);
|
|
void disable_usb_clocks(int index);
|
|
void do_board_detect(void);
|
|
u32 get_sys_clk_index(void);
|