mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
9b1b6d4225
This reverts commit 90c08d9e08.
I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is
actually too big for some boards. Perhaps 0x800 is enough, but the
situation varies board by board.
Let's postpone our decision until we come up with a better idea.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
60 lines
1.3 KiB
Plaintext
60 lines
1.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
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CONFIG_FIT=y
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CONFIG_VERSION_VARIABLE=y
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CONFIG_SPL=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_USB_MASS_STORAGE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DM_GPIO=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_SYS_I2C_DW=y
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CONFIG_DM_MMC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_SYS_NS16550=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_DESIGNWARE_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_G_DNL_MANUFACTURER="altera"
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CONFIG_G_DNL_VENDOR_NUM=0x0525
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CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
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CONFIG_USE_TINY_PRINTF=y
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