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https://github.com/brain-hackers/u-boot-brain
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![Patrice Chotard](/assets/img/avatar_default.png)
This driver is adapted from linux drivers/reset/reset-stm32.c It's compatible with STM32 F4/F7/H7 SoCs. This driver doesn't implement .of_match as it's binded by MFD RCC driver. To add support for each SoC family, a SoC's specific include/dt-binfings/mfd/stm32xx-rcc.h file must be added. This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs. Other SoCs support will be added in the future. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
78 lines
2.6 KiB
Plaintext
78 lines
2.6 KiB
Plaintext
menu "Reset Controller Support"
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config DM_RESET
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bool "Enable reset controllers using Driver Model"
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depends on DM && OF_CONTROL
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help
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Enable support for the reset controller driver class. Many hardware
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modules are equipped with a reset signal, typically driven by some
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reset controller hardware module within the chip. In U-Boot, reset
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controller drivers allow control over these reset signals. In some
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cases this API is applicable to chips outside the CPU as well,
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although driving such reset isgnals using GPIOs may be more
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appropriate in this case.
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config SANDBOX_RESET
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bool "Enable the sandbox reset test driver"
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depends on DM_MAILBOX && SANDBOX
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help
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Enable support for a test reset controller implementation, which
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simply accepts requests to reset various HW modules without actually
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doing anything beyond a little error checking.
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config STI_RESET
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bool "Enable the STi reset"
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depends on ARCH_STI
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help
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Support for reset controllers on STMicroelectronics STiH407 family SoCs.
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Say Y if you want to control reset signals provided by system config
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block.
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config STM32_RESET
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bool "Enable the STM32 reset"
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depends on STM32
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help
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Support for reset controllers on STMicroelectronics STM32 family SoCs.
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This resset driver is compatible with STM32 F4/F7 and H7 SoCs.
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config TEGRA_CAR_RESET
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bool "Enable Tegra CAR-based reset driver"
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depends on TEGRA_CAR
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help
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Enable support for manipulating Tegra's on-SoC reset signals via
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direct register access to the Tegra CAR (Clock And Reset controller).
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config TEGRA186_RESET
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bool "Enable Tegra186 BPMP-based reset driver"
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depends on TEGRA186_BPMP
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help
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Enable support for manipulating Tegra's on-SoC reset signals via IPC
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requests to the BPMP (Boot and Power Management Processor).
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config RESET_BCM6345
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bool "Reset controller driver for BCM6345"
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depends on DM_RESET && ARCH_BMIPS
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help
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Support reset controller on BCM6345.
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config RESET_UNIPHIER
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bool "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER
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default y
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config AST2500_RESET
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bool "Reset controller driver for AST2500 SoCs"
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depends on DM_RESET && WDT_ASPEED
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default y if ASPEED_AST2500
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help
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Support for reset controller on AST2500 SoC. This controller uses
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watchdog to reset different peripherals and thus only supports
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resets that are supported by watchdog. The main limitation though
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is that some reset signals, like I2C or MISC reset multiple devices.
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endmenu
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