mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
9ac0e7b37a
UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must be marked as dm-pre-reloc to prevent fdtgrep from stripping them off. Sprinkling U-Boot-specific properties all over the place is painful because DT files are synced with Linux from time to time. Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is appended to UniPhier V7 DTS before the build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
75 lines
1.0 KiB
Plaintext
75 lines
1.0 KiB
Plaintext
/*
|
|
* Device Tree Source for UniPhier sLD8 Reference Board
|
|
*
|
|
* Copyright (C) 2015-2016 Socionext Inc.
|
|
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*
|
|
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "uniphier-sld8.dtsi"
|
|
#include "uniphier-ref-daughter.dtsi"
|
|
#include "uniphier-support-card.dtsi"
|
|
|
|
/ {
|
|
model = "UniPhier sLD8 Reference Board";
|
|
compatible = "socionext,uniphier-sld8-ref", "socionext,uniphier-sld8";
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
aliases {
|
|
serial0 = &serial0;
|
|
serial1 = &serial1;
|
|
serial2 = &serial2;
|
|
serial3 = &serial3;
|
|
i2c0 = &i2c0;
|
|
i2c1 = &i2c1;
|
|
i2c2 = &i2c2;
|
|
i2c3 = &i2c3;
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x20000000>;
|
|
};
|
|
};
|
|
|
|
ðsc {
|
|
interrupts = <0 48 4>;
|
|
};
|
|
|
|
&serial0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&sd {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2 {
|
|
status = "okay";
|
|
};
|