mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-25 11:28:51 +09:00
06f4e36baf
Use mask to clear old setting before direct set the new config,
or else there it will mess up the config when it's not the same
with default value.
Fixes: 3851059 rockchip: Setup default PWM flags
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/*
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* (C) Copyright 2016 Google, Inc
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* (C) Copyright 2008-2014 Rockchip Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_PWM_H
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#define _ASM_ARCH_PWM_H
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struct rk3288_pwm {
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u32 cnt;
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u32 period_hpr;
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u32 duty_lpr;
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u32 ctrl;
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};
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check_member(rk3288_pwm, ctrl, 0xc);
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#define RK_PWM_DISABLE (0 << 0)
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#define RK_PWM_ENABLE (1 << 0)
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#define PWM_ONE_SHOT (0 << 1)
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#define PWM_CONTINUOUS (1 << 1)
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#define RK_PWM_CAPTURE (1 << 2)
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#define PWM_DUTY_POSTIVE (1 << 3)
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#define PWM_DUTY_NEGATIVE (0 << 3)
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#define PWM_DUTY_MASK (1 << 3)
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#define PWM_INACTIVE_POSTIVE (1 << 4)
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#define PWM_INACTIVE_NEGATIVE (0 << 4)
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#define PWM_INACTIVE_MASK (1 << 4)
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#define PWM_OUTPUT_LEFT (0 << 5)
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#define PWM_OUTPUT_CENTER (1 << 5)
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#define PWM_LP_ENABLE (1 << 8)
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#define PWM_LP_DISABLE (0 << 8)
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#define PWM_SEL_SCALE_CLK (1 << 9)
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#define PWM_SEL_SRC_CLK (0 << 9)
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#endif
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