mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-08 04:06:15 +09:00
df518f804f
With DM enabled, gpio numbering is assigned based on the probed order of gpios, irrespective of the gpio base. So enable all necessary gpios in SPL. Fixes: edf25d94d55c (“ARM: dts: OMAP5+: Enable gpio in SPL”) Reported-by: Gou, Hongmei <h-gou@ti.com> Tested-by: Aparna Balasubramanian <aparnab@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
90 lines
977 B
Plaintext
90 lines
977 B
Plaintext
/*
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* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* Based on "dra7.dtsi"
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*/
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/{
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chosen {
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tick-timer = &timer2;
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};
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ocp {
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u-boot,dm-spl;
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ocp2scp@4a090000 {
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compatible = "ti,omap-ocp2scp", "simple-bus";
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};
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};
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};
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&uart1 {
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u-boot,dm-spl;
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reg-shift = <2>;
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};
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&uart3 {
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u-boot,dm-spl;
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reg-shift = <2>;
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};
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&mmc1 {
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u-boot,dm-spl;
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};
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&mmc2 {
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u-boot,dm-spl;
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};
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&l4_cfg {
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u-boot,dm-spl;
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};
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&scm {
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u-boot,dm-spl;
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};
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&scm_conf {
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u-boot,dm-spl;
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};
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&qspi {
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u-boot,dm-spl;
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m25p80@0 {
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compatible = "spi-flash";
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u-boot,dm-spl;
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};
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&gpio6 {
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u-boot,dm-spl;
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};
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&gpio7 {
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u-boot,dm-spl;
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};
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