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https://github.com/brain-hackers/u-boot-brain
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0d3f97db71
Upstream Linux has the unit address being added to the various 66AK2Gx boards dts. Therefore, update the dts to mimic this change. Also remove memory node from the base K2G dtsi file. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
205 lines
4.7 KiB
Plaintext
205 lines
4.7 KiB
Plaintext
/*
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* Copyright 2014 Texas Instruments, Inc.
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*
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* Device Tree Source for K2G SOC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Texas Instruments K2G SoC";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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chosen { };
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aliases {
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serial0 = &uart0;
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spi0 = &spi0;
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spi1 = &spi1;
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spi2 = &spi2;
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spi3 = &spi3;
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spi4 = &qspi;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&gic>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <0>;
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};
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};
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gic: interrupt-controller {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x02561000 0x0 0x1000>,
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<0x0 0x02562000 0x0 0x2000>,
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<0x0 0x02564000 0x0 0x1000>,
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<0x0 0x02566000 0x0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ti,keystone","simple-bus";
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interrupt-parent = <&gic>;
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ranges;
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uart0: serial@02530c00 {
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compatible = "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02530c00 0x100>;
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clock-names = "uart";
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interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
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};
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mdio: mdio@4200f00 {
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compatible = "ti,keystone_mdio", "ti,davinci_mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
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/* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
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clock-names = "fck";
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reg = <0x04200f00 0x100>;
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status = "disabled";
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bus_freq = <2500000>;
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};
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qspi: qspi@2940000 {
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compatible = "cadence,qspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x02940000 0x1000>,
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<0x24000000 0x4000000>;
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interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
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num-cs = <4>;
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fifo-depth = <256>;
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sram-size = <256>;
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status = "disabled";
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};
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#include "keystone-k2g-netcp.dtsi"
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pmmc: pmmc@2900000 {
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compatible = "ti,power-processor";
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reg = <0x02900000 0x40000>;
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ti,lpsc_module = <1>;
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};
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spi0: spi@21805400 {
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compatible = "ti,keystone-spi", "ti,dm6441-spi";
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reg = <0x21805400 0x200>;
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num-cs = <4>;
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ti,davinci-spi-intr-line = <0>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@21805800 {
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compatible = "ti,keystone-spi", "ti,dm6441-spi";
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reg = <0x21805800 0x200>;
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num-cs = <4>;
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ti,davinci-spi-intr-line = <0>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@21805c00 {
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compatible = "ti,keystone-spi", "ti,dm6441-spi";
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reg = <0x21805C00 0x200>;
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num-cs = <4>;
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ti,davinci-spi-intr-line = <0>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi3: spi@21806000 {
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compatible = "ti,keystone-spi", "ti,dm6441-spi";
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reg = <0x21806000 0x200>;
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num-cs = <4>;
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ti,davinci-spi-intr-line = <0>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c0: i2c@2530000 {
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compatible = "ti,keystone-i2c";
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reg = <0x02530000 0x400>;
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clock-frequency = <100000>;
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interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@2530400 {
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compatible = "ti,keystone-i2c";
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reg = <0x02530400 0x400>;
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clock-frequency = <100000>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@2530800 {
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compatible = "ti,keystone-i2c";
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reg = <0x02530800 0x400>;
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clock-frequency = <100000>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mmc0: mmc@23000000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x23000000 0x400>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
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bus-width = <4>;
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ti,needs-special-reset;
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no-1-8-v;
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max-frequency = <96000000>;
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status = "disabled";
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};
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mmc1: mmc@23100000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x23100000 0x400>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
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bus-width = <8>;
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ti,needs-special-reset;
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ti,non-removable;
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max-frequency = <96000000>;
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status = "disabled";
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clock-names = "fck";
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};
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};
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};
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