mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
40 lines
1.4 KiB
C
40 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010 Samsung Electronics
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* Naveen Krishna Ch <ch.naveen@samsung.com>
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*
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* Note: This file contains the register description for Memory subsystem
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* (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
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*
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* Only SROMC is defined as of now
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*/
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#ifndef __ASM_ARCH_SROMC_H_
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#define __ASM_ARCH_SROMC_H_
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#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0))
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#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
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/* 1-> Byte base address*/
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#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2))
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#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3))
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#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */
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#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */
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#define SMC_BC_TACC(x) (x << 16) /* 14clk access cycle */
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#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */
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#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */
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#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */
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#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */
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#ifndef __ASSEMBLY__
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struct s5p_sromc {
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unsigned int bw;
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unsigned int bc[6];
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};
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#endif /* __ASSEMBLY__ */
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/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
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void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
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#endif /* __ASM_ARCH_SMC_H_ */
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