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https://github.com/brain-hackers/u-boot-brain
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6d8abe6a8a
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup PL310 control register, however, that is something that is generic enough to be used for OMAP5 generation of processors as well. The only difference being the service being invoked for the function. So, convert the service to a macro and use a generic name (same as that used in Linux for some consistency). While at that, also add a data barrier which is necessary as per recommendation. While at this, smc #0 is maintained as handcoded assembly thanks to various gcc version eccentricities, discussion thread: http://marc.info/?t=142542166800001&r=1&w=2 Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
37 lines
742 B
ArmAsm
37 lines
742 B
ArmAsm
/*
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* Board specific setup info
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Aneesh V <aneesh@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/arch/omap.h>
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#include <asm/omap_common.h>
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#include <asm/arch/spl.h>
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#include <linux/linkage.h>
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ENTRY(save_boot_params)
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ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS
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str r0, [r1]
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b save_boot_params_ret
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ENDPROC(save_boot_params)
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ENTRY(omap_smc1)
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PUSH {r4-r12, lr} @ save registers - ROM code may pollute
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@ our registers
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MOV r12, r0 @ Service
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MOV r0, r1 @ Argument
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DSB
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DMB
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.word 0xe1600070 @ SMC #0 - hand assembled for GCC versions
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@ call ROM Code API for the service requested
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POP {r4-r12, pc}
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ENDPROC(omap_smc1)
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