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https://github.com/brain-hackers/u-boot-brain
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3eb90bad65
According to the PPC reference implementation the udelay() function is responsible for resetting the watchdog timer as frequently as needed. Most other architectures do not meet that requirement, so long-running operations might result in a watchdog reset. This patch adds a generic udelay() function which takes care of resetting the watchdog before calling an architecture-specific __udelay(). Signed-off-by: Ingo van Lil <inguin@gmx.de>
159 lines
4.4 KiB
C
159 lines
4.4 KiB
C
/*
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* (C) Copyright 2004
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* Texas Instruments
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/bits.h>
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#include <asm/arch/omap2420.h>
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#define TIMER_LOAD_VAL 0
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/* macro to read the 32 bit timer */
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#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR)))
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static ulong timestamp;
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static ulong lastinc;
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int timer_init (void)
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{
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int32_t val;
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/* Start the counter ticking up */
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*((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/
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val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
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*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
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reset_timer_masked(); /* init the timestamp and lastinc value */
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return(0);
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}
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/*
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* timer without interrupts
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*/
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void reset_timer (void)
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{
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reset_timer_masked ();
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}
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ulong get_timer (ulong base)
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{
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return get_timer_masked () - base;
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}
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void set_timer (ulong t)
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{
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timestamp = t;
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}
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/* delay x useconds AND perserve advance timstamp value */
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void __udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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tmp = get_timer (0); /* get current timestamp */
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if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */
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reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
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else
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tmo += tmp; /* else, set advancing stamp wake up time */
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while (get_timer_masked () < tmo)/* loop till event */
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/*NOP*/;
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}
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void reset_timer_masked (void)
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{
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/* reset time */
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lastinc = READ_TIMER; /* capture current incrementer value time */
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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ulong get_timer_masked (void)
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{
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ulong now = READ_TIMER; /* current tick value */
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if (now >= lastinc) /* normal mode (non roll) */
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timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */
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else /* we have rollover of incrementer */
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timestamp += (0xFFFFFFFF - lastinc) + now;
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lastinc = now;
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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ulong tmo;
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ulong endtime;
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signed long diff;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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endtime = get_timer_masked () + tmo;
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do {
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ulong now = get_timer_masked ();
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diff = endtime - now;
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} while (diff >= 0);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk (void)
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{
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ulong tbclk;
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tbclk = CONFIG_SYS_HZ;
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return tbclk;
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}
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