mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-07 05:13:21 +09:00
eb53941206
Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
67 lines
1.8 KiB
C
67 lines
1.8 KiB
C
/*
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* Copyright 2008, 2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* Version 2 as published by the Free Software Foundation.
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/mp.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern void ft_fixup_num_cores(void *blob);
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extern void ft_srio_setup(void *blob);
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_MP
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int off;
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u32 bootpg = determine_mp_bootpg(NULL);
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#endif
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"timebase-frequency", bd->bi_busfreq / 4, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"clock-frequency", bd->bi_intfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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#if defined(CONFIG_MPC8641)
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do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
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"bus-frequency", gd->lbc_clk, 1);
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#endif
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do_fixup_by_compat_u32(blob, "fsl,elbc",
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"bus-frequency", gd->lbc_clk, 1);
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \
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|| defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
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fdt_fixup_ethernet(blob);
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#endif
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#ifdef CONFIG_SYS_NS16550
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do_fixup_by_compat_u32(blob, "ns16550",
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"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
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#endif
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#ifdef CONFIG_MP
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/* Reserve the boot page so OSes dont use it */
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off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
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if (off < 0)
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printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
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ft_fixup_num_cores(blob);
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#endif
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#ifdef CONFIG_SYS_SRIO
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ft_srio_setup(blob);
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#endif
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}
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