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![Marek Behún](/assets/img/avatar_default.png)
This adds a weak definition of comphy_update_map to comphy_core, which does nothing. If this function is defined elsewhere, for example in board file, the board file can change some parameters of SERDES configuration. This is needed on Turris Mox, where the SERDES speed on lane 1 has to be set differently when SFP module is connected and when Topaz Switch module is connected. This is a temporary solution. When the comphy driver for armada-3720 will be added to the kernel, the comphy driver in u-boot shall also be updated and this should be done differently then. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
191 lines
5.1 KiB
C
191 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015-2016 Marvell International Ltd.
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*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <linux/errno.h>
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#include <asm/io.h>
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#include "comphy_core.h"
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#define COMPHY_MAX_CHIP 4
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DECLARE_GLOBAL_DATA_PTR;
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static const char *get_speed_string(u32 speed)
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{
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static const char * const speed_strings[] = {
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"1.25 Gbps", "1.5 Gbps", "2.5 Gbps",
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"3.0 Gbps", "3.125 Gbps", "5 Gbps", "6 Gbps",
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"6.25 Gbps", "10.31 Gbps"
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};
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if (speed < 0 || speed > PHY_SPEED_MAX)
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return "invalid";
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return speed_strings[speed];
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}
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static const char *get_type_string(u32 type)
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{
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static const char * const type_strings[] = {
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"UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3",
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"SATA0", "SATA1", "SATA2", "SATA3", "SGMII0",
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"SGMII1", "SGMII2", "SGMII3", "QSGMII",
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"USB3_HOST0", "USB3_HOST1", "USB3_DEVICE",
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"XAUI0", "XAUI1", "XAUI2", "XAUI3",
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"RXAUI0", "RXAUI1", "SFI", "IGNORE"
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};
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if (type < 0 || type > PHY_TYPE_MAX)
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return "invalid";
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return type_strings[type];
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}
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void comphy_print(struct chip_serdes_phy_config *chip_cfg,
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struct comphy_map *comphy_map_data)
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{
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u32 lane;
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for (lane = 0; lane < chip_cfg->comphy_lanes_count;
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lane++, comphy_map_data++) {
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if (comphy_map_data->speed == PHY_SPEED_INVALID) {
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printf("Comphy-%d: %-13s\n", lane,
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get_type_string(comphy_map_data->type));
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} else {
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printf("Comphy-%d: %-13s %-10s\n", lane,
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get_type_string(comphy_map_data->type),
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get_speed_string(comphy_map_data->speed));
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}
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}
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}
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__weak int comphy_update_map(struct comphy_map *serdes_map, int count)
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{
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return 0;
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}
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static int comphy_probe(struct udevice *dev)
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{
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const void *blob = gd->fdt_blob;
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int node = dev_of_offset(dev);
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struct chip_serdes_phy_config *chip_cfg = dev_get_priv(dev);
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struct comphy_map comphy_map_data[MAX_LANE_OPTIONS];
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int subnode;
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int lane;
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int last_idx = 0;
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static int current_idx;
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int res;
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/* Save base addresses for later use */
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chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0);
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if (IS_ERR(chip_cfg->comphy_base_addr))
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return PTR_ERR(chip_cfg->comphy_base_addr);
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chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1);
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if (IS_ERR(chip_cfg->hpipe3_base_addr))
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return PTR_ERR(chip_cfg->hpipe3_base_addr);
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chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node,
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"max-lanes", 0);
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if (chip_cfg->comphy_lanes_count <= 0) {
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dev_err(&dev->dev, "comphy max lanes is wrong\n");
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return -EINVAL;
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}
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chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node,
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"mux-bitcount", 0);
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if (chip_cfg->comphy_mux_bitcount <= 0) {
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dev_err(&dev->dev, "comphy mux bit count is wrong\n");
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return -EINVAL;
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}
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chip_cfg->comphy_mux_lane_order =
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fdtdec_locate_array(blob, node, "mux-lane-order",
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chip_cfg->comphy_lanes_count);
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if (device_is_compatible(dev, "marvell,comphy-armada-3700"))
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chip_cfg->ptr_comphy_chip_init = comphy_a3700_init;
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if (device_is_compatible(dev, "marvell,comphy-cp110"))
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chip_cfg->ptr_comphy_chip_init = comphy_cp110_init;
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/*
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* Bail out if no chip_init function is defined, e.g. no
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* compatible node is found
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*/
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if (!chip_cfg->ptr_comphy_chip_init) {
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dev_err(&dev->dev, "comphy: No compatible DT node found\n");
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return -ENODEV;
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}
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lane = 0;
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fdt_for_each_subnode(subnode, blob, node) {
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/* Skip disabled ports */
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if (!fdtdec_get_is_enabled(blob, subnode))
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continue;
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comphy_map_data[lane].speed = fdtdec_get_int(
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blob, subnode, "phy-speed", PHY_TYPE_INVALID);
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comphy_map_data[lane].type = fdtdec_get_int(
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blob, subnode, "phy-type", PHY_SPEED_INVALID);
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comphy_map_data[lane].invert = fdtdec_get_int(
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blob, subnode, "phy-invert", PHY_POLARITY_NO_INVERT);
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comphy_map_data[lane].clk_src = fdtdec_get_bool(blob, subnode,
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"clk-src");
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comphy_map_data[lane].end_point = fdtdec_get_bool(blob, subnode,
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"end_point");
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if (comphy_map_data[lane].type == PHY_TYPE_INVALID) {
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printf("no phy type for lane %d, setting lane as unconnected\n",
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lane + 1);
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}
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lane++;
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}
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res = comphy_update_map(comphy_map_data, chip_cfg->comphy_lanes_count);
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if (res < 0)
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return res;
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/* Save CP index for MultiCP devices (A8K) */
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chip_cfg->cp_index = current_idx++;
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/* PHY power UP sequence */
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chip_cfg->ptr_comphy_chip_init(chip_cfg, comphy_map_data);
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/* PHY print SerDes status */
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if (of_machine_is_compatible("marvell,armada8040"))
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printf("Comphy chip #%d:\n", chip_cfg->cp_index);
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comphy_print(chip_cfg, comphy_map_data);
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/*
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* Only run the dedicated PHY init code once, in the last PHY init call
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*/
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if (of_machine_is_compatible("marvell,armada8040"))
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last_idx = 1;
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if (chip_cfg->cp_index == last_idx) {
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/* Initialize dedicated PHYs (not muxed SerDes lanes) */
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comphy_dedicated_phys_init();
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}
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return 0;
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}
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static const struct udevice_id comphy_ids[] = {
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{ .compatible = "marvell,mvebu-comphy" },
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{ }
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};
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U_BOOT_DRIVER(mvebu_comphy) = {
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.name = "mvebu_comphy",
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.id = UCLASS_MISC,
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.of_match = comphy_ids,
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.probe = comphy_probe,
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.priv_auto_alloc_size = sizeof(struct chip_serdes_phy_config),
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};
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