Aneesh Bansal 9711f52806 armv8/ls1043ardb: add SECURE BOOT target for NOR ... LS1043ARDB Secure Boot Target from NOR has been added. - Configs defined to enable esbc_validate. - ESBC Address in header is made 64 bit. - SMMU is re-configured in Bypass mode. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2015-12-15 08:57:35 +08:00
..
clock.h
config.h	armv8/ls1043ardb: add SECURE BOOT target for NOR	2015-12-15 08:57:35 +08:00
cpu.h	armv8: fsl-layerscape: Make DDR non secure in MMU tables	2015-12-15 08:57:33 +08:00
fdt.h	armv8/ls1043aqds: add LS1043AQDS board support	2015-11-30 09:11:10 -08:00
fsl_serdes.h	armv8: ls2085a: Add support of LS2085A SoC	2015-11-30 09:10:47 -08:00
immap_lsch2.h	armv8/ls1043ardb: add SECURE BOOT target for NOR	2015-12-15 08:57:35 +08:00
immap_lsch3.h	pci/layerscape: add support for LS1043A PCIe LUT register access	2015-11-30 09:11:10 -08:00
imx-regs.h
ls2080a_stream_id.h	armv8: LS2080A: Rename LS2085A to reflect LS2080A	2015-11-30 08:53:04 -08:00
mmu.h
mp.h
ns_access.h
soc.h	armv8: ls2085a: Add workaround of errata A009635	2015-11-30 09:11:12 -08:00
speed.h