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https://github.com/brain-hackers/u-boot-brain
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3dc2f4549c
DTC issues a warning because #address-cells and #size-cells properties are not set in the mdio node. Also add ethernet1 alias. Also add RTC node. Also fix USB3 regulator startup delay time. Also fix PCI Express SERDES speed to 5 GHz (this is only cosmetic, the speed value is not used byt the comphy driver for PCI Express, but should be 5 GHz nonetheless). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
157 lines
2.7 KiB
Plaintext
157 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ or X11
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/*
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* Device Tree file for CZ.NIC Turris Mox Board
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* 2018 by Marek Behun <marek.behun@nic.cz>
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*
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* Based on armada-3720-espressobin.dts by:
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Konstantin Porotchkin <kostap@marvell.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-372x.dtsi"
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/ {
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model = "CZ.NIC Turris Mox Board";
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compatible = "cznic,turris-mox", "marvell,armada3720",
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"marvell,armada3710";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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ethernet0 = ð0;
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ethernet1 = ð1;
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i2c0 = &i2c0;
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spi0 = &spi0;
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
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};
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reg_usb3_vbus: usb3_vbus@0 {
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compatible = "regulator-fixed";
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regulator-name = "usb3-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <2000000>;
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shutdown-delay-us = <1000000>;
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gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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eth_phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&comphy {
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max-lanes = <3>;
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phy0 {
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phy-type = <PHY_TYPE_SGMII1>;
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phy-speed = <PHY_SPEED_3_125G>;
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};
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phy1 {
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phy-type = <PHY_TYPE_PEX0>;
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phy-speed = <PHY_SPEED_5G>;
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};
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phy2 {
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phy-type = <PHY_TYPE_USB3_HOST0>;
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phy-speed = <PHY_SPEED_5G>;
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};
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};
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ð0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
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phy-mode = "rgmii";
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phy = <ð_phy1>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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rtc@6f {
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compatible = "microchip,mcp7941x";
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reg = <0x6f>;
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};
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};
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&sdhci1 {
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bus-width = <4>;
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status = "okay";
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};
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&pinctrl_nb {
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spi_cs1_pins: spi-cs1-pins {
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groups = "spi_cs1";
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function = "spi";
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};
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};
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi_cs1_pins>;
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assigned-clocks = <&nb_periph_clk 7>;
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assigned-clock-parents = <&tbg 1>;
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assigned-clock-rates = <20000000>;
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,s25fl064l", "spi-flash";
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reg = <0>;
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spi-max-frequency = <20000000>;
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m25p,fast-read;
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};
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moxtet@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cznic,moxtet";
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reg = <1>;
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reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
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spi-max-frequency = <1000000>;
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spi-cpol;
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spi-cpha;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&usb2 {
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status = "okay";
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};
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&usb3 {
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vbus-supply = <®_usb3_vbus>;
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status = "okay";
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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