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https://github.com/brain-hackers/u-boot-brain
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aea02abec5
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs are connected to the SPI busses. This patch uses board specific write code to program the bitstream via SPI direct write mode. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
13 lines
320 B
C
13 lines
320 B
C
/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Base addresses for the SPI direct access mode */
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#define SPI_BUS0_DEV1_BASE 0xe0000000
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#define SPI_BUS0_DEV1_SIZE (1 << 20)
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#define SPI_BUS1_DEV2_BASE (SPI_BUS0_DEV1_BASE + SPI_BUS0_DEV1_SIZE)
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void board_fpga_add(void);
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