mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-03 16:53:44 +09:00
064b55cfcb
There was for long time no activity in the mpx5xxx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in mpc5xxx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
118 lines
2.8 KiB
C
118 lines
2.8 KiB
C
/*
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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#include "config.h"
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#include "asm/types.h"
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/* Architecture-specific global data */
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struct arch_global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT)
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u8 sdhc_adapter;
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#endif
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#endif
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#if defined(CONFIG_CPM2)
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/* There are many clocks on the MPC8260 - see page 9-5 */
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unsigned long vco_out;
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unsigned long cpm_clk;
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unsigned long scc_clk;
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unsigned long brg_clk;
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#endif
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/* TODO: sjg@chromium.org: Should these be unslgned long? */
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#if defined(CONFIG_MPC83xx)
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/* There are other clocks in the MPC83XX */
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u32 csb_clk;
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# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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u32 tsec1_clk;
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u32 tsec2_clk;
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u32 usbdr_clk;
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# elif defined(CONFIG_MPC8309)
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u32 usbdr_clk;
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# endif
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# if defined(CONFIG_MPC834x)
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u32 usbmph_clk;
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# endif /* CONFIG_MPC834x */
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# if defined(CONFIG_MPC8315)
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u32 tdm_clk;
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# endif
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u32 core_clk;
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u32 enc_clk;
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u32 lbiu_clk;
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u32 lclk_clk;
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# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
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defined(CONFIG_MPC837x)
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u32 pciexp1_clk;
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u32 pciexp2_clk;
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# endif
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# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
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u32 sata_clk;
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# endif
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# if defined(CONFIG_MPC8360)
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u32 mem_sec_clk;
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# endif /* CONFIG_MPC8360 */
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#endif
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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u32 lbc_clk;
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void *cpu;
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#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
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defined(CONFIG_MPC86xx)
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u32 i2c1_clk;
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u32 i2c2_clk;
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#endif
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#if defined(CONFIG_QE)
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u32 qe_clk;
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u32 brg_clk;
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uint mp_alloc_base;
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uint mp_alloc_top;
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#endif /* CONFIG_QE */
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#if defined(CONFIG_FSL_LAW)
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u32 used_laws;
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#endif
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#if defined(CONFIG_E500)
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u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
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#endif
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unsigned long reset_status; /* reset status register at boot */
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#if defined(CONFIG_MPC83xx)
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unsigned long arbiter_event_attributes;
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unsigned long arbiter_event_address;
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#endif
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#if defined(CONFIG_CPM2)
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unsigned int dp_alloc_base;
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unsigned int dp_alloc_top;
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#endif
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#if defined(CONFIG_4xx)
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u32 uart_clk;
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#endif /* CONFIG_4xx */
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#ifdef CONFIG_SYS_FPGA_COUNT
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unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
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#endif
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#if defined(CONFIG_WD_MAX_RATE)
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unsigned long long wdt_last; /* trace watch-dog triggering rate */
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#endif
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#if defined(CONFIG_LWMON5)
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unsigned long kbd_status;
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#endif
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};
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#include <asm-generic/global_data.h>
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#if 1
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
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#else /* We could use plain global data, but the resulting code is bigger */
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#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
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#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
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gd_t *gd
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#endif
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#endif /* __ASM_GBL_DATA_H */
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