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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 17:38:51 +09:00
![Tom Warren](/assets/img/avatar_default.png)
Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
284 lines
7.2 KiB
Plaintext
284 lines
7.2 KiB
Plaintext
#include <dt-bindings/clock/tegra210-car.h>
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "nvidia,tegra210";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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gic: interrupt-controller@0,50041000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x50041000 0x0 0x1000>,
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<0x0 0x50042000 0x0 0x2000>,
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<0x0 0x50044000 0x0 0x2000>,
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<0x0 0x50046000 0x0 0x2000>;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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interrupt-parent = <&gic>;
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};
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tegra_car: clock@0,60006000 {
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compatible = "nvidia,tegra210-car";
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reg = <0x0 0x60006000 0x0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gpio: gpio@0,6000d000 {
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compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
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reg = <0x0 0x6000d000 0x0 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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i2c@0,7000c000 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c000 0x0 0x100>;
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interrupts = <0 38 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 12>;
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status = "disabled";
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};
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i2c@0,7000c400 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c400 0x0 0x100>;
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interrupts = <0 84 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 54>;
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status = "disabled";
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};
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i2c@0,7000c500 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c500 0x0 0x100>;
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interrupts = <0 92 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 67>;
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status = "disabled";
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};
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i2c@0,7000c700 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c700 0x0 0x100>;
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interrupts = <0 120 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 103>;
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status = "disabled";
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};
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i2c@0,7000d000 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000d000 0x0 0x100>;
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interrupts = <0 53 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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status = "disabled";
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};
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i2c@0,7000d100 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000d100 0x0 0x100>;
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interrupts = <0 53 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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status = "disabled";
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};
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uarta: serial@0,70006000 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006000 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTA>;
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resets = <&tegra_car 6>;
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reset-names = "serial";
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status = "disabled";
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};
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uartb: serial@0,70006040 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006040 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTB>;
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resets = <&tegra_car 7>;
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reset-names = "serial";
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status = "disabled";
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};
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uartc: serial@0,70006200 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006200 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTC>;
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resets = <&tegra_car 55>;
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reset-names = "serial";
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status = "disabled";
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};
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uartd: serial@0,70006300 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006300 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTD>;
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resets = <&tegra_car 65>;
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reset-names = "serial";
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status = "disabled";
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};
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spi@0,7000d400 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d400 0x0 0x200>;
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interrupts = <0 59 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC1>;
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resets = <&tegra_car 41>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000d600 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d600 0x0 0x200>;
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interrupts = <0 82 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC2>;
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resets = <&tegra_car 44>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000d800 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d800 0x0 0x200>;
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interrupts = <0 83 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC3>;
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resets = <&tegra_car 46>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000da00 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000da00 0x0 0x200>;
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interrupts = <0 93 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC4>;
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resets = <&tegra_car 68>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,70410000 {
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compatible = "nvidia,tegra210-qspi";
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reg = <0x0 0x70410000 0x0 0x1000>;
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interrupts = <0 10 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 211>;
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status = "disabled";
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};
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padctl: padctl@0,7009f000 {
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compatible = "nvidia,tegra210-xusb-padctl";
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reg = <0x0 0x7009f000 0x0 0x1000>;
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resets = <&tegra_car 142>;
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reset-names = "padctl";
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#phy-cells = <1>;
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};
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sdhci@0,700b0000 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0000 0x0 0x200>;
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interrupts = <0 14 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
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resets = <&tegra_car 14>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0200 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0200 0x0 0x200>;
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interrupts = <0 15 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
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resets = <&tegra_car 9>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0400 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0400 0x0 0x200>;
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interrupts = <0 19 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
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resets = <&tegra_car 69>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0600 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0600 0x0 0x200>;
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interrupts = <0 31 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
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resets = <&tegra_car 15>;
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reset-names = "sdhci";
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status = "disabled";
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};
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usb@0,7d000000 {
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compatible = "nvidia,tegra210-ehci";
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reg = <0x0 0x7d000000 0x0 0x4000>;
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interrupts = <0 20 0x04>;
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phy_type = "utmi";
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clocks = <&tegra_car TEGRA210_CLK_USBD>;
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resets = <&tegra_car 22>;
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reset-names = "usb";
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status = "disabled";
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};
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usb@0,7d004000 {
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compatible = "nvidia,tegra210-ehci";
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reg = <0x0 0x7d004000 0x0 0x4000>;
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interrupts = < 53 >;
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phy_type = "utmi";
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clocks = <&tegra_car TEGRA210_CLK_USB2>;
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resets = <&tegra_car 58>;
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reset-names = "usb";
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status = "disabled";
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};
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};
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