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https://github.com/brain-hackers/u-boot-brain
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c8f2a060a1
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.
In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.
With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.
When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.
As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffd.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
116 lines
2.9 KiB
Plaintext
116 lines
2.9 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SPL_SYS_THUMB_BUILD=y
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CONFIG_ARCH_MX28=y
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CONFIG_SYS_TEXT_BASE=0x40002000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x800
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
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CONFIG_DM_GPIO=y
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CONFIG_SPL_DM_SPI=y
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CONFIG_SPL_TEXT_BASE=0x1000
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CONFIG_TARGET_XEA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
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CONFIG_SPL=y
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CONFIG_ENV_OFFSET_REDUND=0x90000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_PAYLOAD="u-boot.img"
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CONFIG_DEFAULT_DEVICE_TREE="imx28-xea"
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CONFIG_FIT=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0,115200n8"
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CONFIG_USE_PREBOOT=y
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CONFIG_PREBOOT="run prebootcmd"
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_SPL_BOARD_INIT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
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CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y
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CONFIG_SPL_DMA=y
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CONFIG_SPL_MMC_TINY=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_SPL=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_DM=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MTD=y
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# CONFIG_CMD_PINMUX is not set
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CONFIG_CMD_SPI=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nor0=spi3.0"
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CONFIG_MTDPARTS_DEFAULT="spi3.0:64k(SPL),448k(uboot),128k(envs),384k(unused1),4096k(kernel),8192k(swupdate),-(unused2)"
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CONFIG_DOS_PARTITION=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent interrupts"
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CONFIG_SPL_OF_PLATDATA=y
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# CONFIG_SPL_OF_PLATDATA_PARENT is not set
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_BUS=y
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CONFIG_ENV_SPI_BUS=3
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=0
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CONFIG_USE_ENV_SPI_MAX_HZ=y
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CONFIG_ENV_SPI_MAX_HZ=40000000
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CONFIG_USE_ENV_SPI_MODE=y
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CONFIG_ENV_SPI_MODE=0x0
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_DEVRES=y
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CONFIG_MXS_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_MXS=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=3
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CONFIG_SF_DEFAULT_MODE=0x0
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CONFIG_SF_DEFAULT_SPEED=40000000
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_PHYLIB=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_ADDR=1
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CONFIG_PHY_FIXED=y
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CONFIG_DM_ETH=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_MXS=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_FS_FAT=y
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# CONFIG_SPL_OF_LIBFDT is not set
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