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https://github.com/brain-hackers/u-boot-brain
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7e1afb62a7
The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com>
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
/*
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* Copyright 2010 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __FSL_MPC83XX_SERDES_H
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#define __FSL_MPC83XX_SERDES_H
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#include <config.h>
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#define FSL_SERDES_CLK_100 (0 << 28)
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#define FSL_SERDES_CLK_125 (1 << 28)
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#define FSL_SERDES_CLK_150 (3 << 28)
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#define FSL_SERDES_PROTO_SATA 0
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#define FSL_SERDES_PROTO_PEX 1
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#define FSL_SERDES_PROTO_PEX_X2 2
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#define FSL_SERDES_PROTO_SGMII 3
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#define FSL_SERDES_VDD_1V 1
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extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
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#endif /* __FSL_MPC83XX_SERDES_H */
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