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https://github.com/brain-hackers/u-boot-brain
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9f1fad1e36
This adds a library that provides CMOS (inside RTC SRAM) access at a very early stage when driver model is not available yet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
52 lines
918 B
C
52 lines
918 B
C
/*
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* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* This library provides CMOS (inside RTC SRAM) access routines at a very
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* early stage when driver model is not available yet. Only read access is
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* provided. The 16-bit/32-bit read are compatible with driver model RTC
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* uclass write ops, that data is stored in little-endian mode.
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*/
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#include <common.h>
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#include <asm/early_cmos.h>
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#include <asm/io.h>
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u8 cmos_read8(u8 addr)
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{
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outb(addr, CMOS_IO_PORT);
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return inb(CMOS_IO_PORT + 1);
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}
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u16 cmos_read16(u8 addr)
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{
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u16 value = 0;
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u16 data;
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int i;
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for (i = 0; i < sizeof(value); i++) {
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data = cmos_read8(addr + i);
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value |= data << (i << 3);
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}
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return value;
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}
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u32 cmos_read32(u8 addr)
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{
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u32 value = 0;
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u32 data;
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int i;
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for (i = 0; i < sizeof(value); i++) {
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data = cmos_read8(addr + i);
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value |= data << (i << 3);
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}
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return value;
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}
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