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https://github.com/brain-hackers/u-boot-brain
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![Bin Meng](/assets/img/avatar_default.png)
The call to FspInitEntry is done in arch/x86/lib/fsp/fsp_car.S so far. It worked pretty well but looks not that good. Apart from doing too much work than just enabling CAR, it cannot read the configuration data from device tree at that time. Now we want to move it a little bit later as part of init_sequence_f[] being called by board_init_f(). This way it looks and works better in the U-Boot initialization path. Due to FSP's design, after calling FspInitEntry it will not return to its caller, instead it jumps to a continuation function which is given by bootloader with a new stack in system memory. The original stack in the CAR is gone, but its content is perserved by FSP and described by a bootloader temporary memory HOB. Technically we can recover anything we had before in the previous stack, but that is way too complicated. To make life much easier, in the FSP continuation routine we just simply call fsp_init_done() and jump back to car_init_ret() to redo the whole board_init_f() initialization, but this time with a non-zero HOB list pointer saved in U-Boot's global data so that we can bypass the FspInitEntry for the second time. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Tested-by: Simon Glass <sjg@chromium.org>
1037 lines
24 KiB
C
1037 lines
24 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2002-2006
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/compiler.h>
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#include <version.h>
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#include <environment.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <fs.h>
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#if defined(CONFIG_CMD_IDE)
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#include <ide.h>
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#endif
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#include <i2c.h>
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#include <initcall.h>
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#include <logbuff.h>
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#include <malloc.h>
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#include <mapmem.h>
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/* TODO: Can we move these into arch/ headers? */
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#ifdef CONFIG_8xx
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#include <mpc8xx.h>
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#endif
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#ifdef CONFIG_5xx
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#include <mpc5xx.h>
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#endif
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#ifdef CONFIG_MPC5xxx
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#include <mpc5xxx.h>
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#endif
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
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#include <asm/mp.h>
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#endif
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#include <os.h>
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#include <post.h>
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#include <spi.h>
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#include <status_led.h>
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#include <trace.h>
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#include <watchdog.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/sections.h>
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#if defined(CONFIG_X86) || defined(CONFIG_ARC)
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#include <asm/init_helpers.h>
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#include <asm/relocate.h>
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#endif
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#ifdef CONFIG_SANDBOX
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#include <asm/state.h>
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#endif
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#include <dm/root.h>
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#include <linux/compiler.h>
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/*
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* Pointer to initial global data area
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*
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* Here we initialize it if needed.
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*/
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#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
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#undef XTRN_DECLARE_GLOBAL_DATA_PTR
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#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
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DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
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#else
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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/*
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* TODO(sjg@chromium.org): IMO this code should be
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* refactored to a single function, something like:
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*
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* void led_set_state(enum led_colour_t colour, int on);
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*/
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/************************************************************************
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* Coloured LED functionality
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************************************************************************
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* May be supplied by boards if desired
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*/
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__weak void coloured_LED_init(void) {}
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__weak void red_led_on(void) {}
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__weak void red_led_off(void) {}
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__weak void green_led_on(void) {}
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__weak void green_led_off(void) {}
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__weak void yellow_led_on(void) {}
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__weak void yellow_led_off(void) {}
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__weak void blue_led_on(void) {}
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__weak void blue_led_off(void) {}
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/*
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* Why is gd allocated a register? Prior to reloc it might be better to
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* just pass it around to each function in this file?
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*
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* After reloc one could argue that it is hardly used and doesn't need
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* to be in a register. Or if it is it should perhaps hold pointers to all
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* global data for all modules, so that post-reloc we can avoid the massive
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* literal pool we get on ARM. Or perhaps just encourage each module to use
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* a structure...
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*/
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/*
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* Could the CONFIG_SPL_BUILD infection become a flag in gd?
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*/
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#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
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static int init_func_watchdog_init(void)
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{
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# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
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defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
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defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
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defined(CONFIG_IMX_WATCHDOG))
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hw_watchdog_init();
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# endif
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puts(" Watchdog enabled\n");
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WATCHDOG_RESET();
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return 0;
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}
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int init_func_watchdog_reset(void)
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{
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WATCHDOG_RESET();
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return 0;
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}
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#endif /* CONFIG_WATCHDOG */
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__weak void board_add_ram_info(int use_default)
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{
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/* please define platform specific board_add_ram_info() */
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}
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static int init_baud_rate(void)
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{
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gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
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return 0;
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}
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static int display_text_info(void)
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{
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#ifndef CONFIG_SANDBOX
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ulong bss_start, bss_end, text_base;
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bss_start = (ulong)&__bss_start;
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bss_end = (ulong)&__bss_end;
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#ifdef CONFIG_SYS_TEXT_BASE
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text_base = CONFIG_SYS_TEXT_BASE;
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#else
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text_base = CONFIG_SYS_MONITOR_BASE;
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#endif
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debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
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text_base, bss_start, bss_end);
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#endif
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#ifdef CONFIG_MODEM_SUPPORT
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debug("Modem Support enabled\n");
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#endif
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#ifdef CONFIG_USE_IRQ
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debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
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debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
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#endif
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return 0;
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}
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static int announce_dram_init(void)
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{
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puts("DRAM: ");
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return 0;
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}
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#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
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static int init_func_ram(void)
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{
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#ifdef CONFIG_BOARD_TYPES
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int board_type = gd->board_type;
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#else
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int board_type = 0; /* use dummy arg */
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#endif
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gd->ram_size = initdram(board_type);
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if (gd->ram_size > 0)
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return 0;
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puts("*** failed ***\n");
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return 1;
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}
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#endif
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static int show_dram_config(void)
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{
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unsigned long long size;
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#ifdef CONFIG_NR_DRAM_BANKS
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int i;
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debug("\nRAM Configuration:\n");
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for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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size += gd->bd->bi_dram[i].size;
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debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
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#ifdef DEBUG
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print_size(gd->bd->bi_dram[i].size, "\n");
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#endif
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}
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debug("\nDRAM: ");
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#else
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size = gd->ram_size;
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#endif
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print_size(size, "");
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board_add_ram_info(0);
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putc('\n');
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return 0;
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}
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__weak void dram_init_banksize(void)
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{
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#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = get_effective_memsize();
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#endif
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}
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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static int init_func_i2c(void)
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{
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puts("I2C: ");
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#ifdef CONFIG_SYS_I2C
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i2c_init_all();
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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puts("ready\n");
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return 0;
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}
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#endif
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#if defined(CONFIG_HARD_SPI)
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static int init_func_spi(void)
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{
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puts("SPI: ");
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spi_init();
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puts("ready\n");
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return 0;
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}
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#endif
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__maybe_unused
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static int zero_global_data(void)
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{
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memset((void *)gd, '\0', sizeof(gd_t));
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return 0;
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}
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static int setup_mon_len(void)
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{
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#if defined(__ARM__) || defined(__MICROBLAZE__)
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gd->mon_len = (ulong)&__bss_end - (ulong)_start;
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#elif defined(CONFIG_SANDBOX)
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gd->mon_len = (ulong)&_end - (ulong)_init;
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#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
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gd->mon_len = CONFIG_SYS_MONITOR_LEN;
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#else
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/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
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gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
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#endif
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return 0;
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}
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__weak int arch_cpu_init(void)
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{
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return 0;
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}
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#ifdef CONFIG_SANDBOX
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static int setup_ram_buf(void)
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{
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struct sandbox_state *state = state_get_current();
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gd->arch.ram_buf = state->ram_buf;
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gd->ram_size = state->ram_size;
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return 0;
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}
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#endif
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/* Get the top of usable RAM */
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__weak ulong board_get_usable_ram_top(ulong total_size)
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{
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#ifdef CONFIG_SYS_SDRAM_BASE
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/*
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* Detect whether we have so much RAM that it goes past the end of our
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* 32-bit address space. If so, clip the usable RAM so it doesn't.
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*/
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if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
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/*
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* Will wrap back to top of 32-bit space when reservations
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* are made.
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*/
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return 0;
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#endif
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return gd->ram_top;
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}
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static int setup_dest_addr(void)
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{
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debug("Monitor len: %08lX\n", gd->mon_len);
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/*
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* Ram is setup, size stored in gd !!
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*/
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debug("Ram size: %08lX\n", (ulong)gd->ram_size);
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#if defined(CONFIG_SYS_MEM_TOP_HIDE)
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/*
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* Subtract specified amount of memory to hide so that it won't
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* get "touched" at all by U-Boot. By fixing up gd->ram_size
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* the Linux kernel should now get passed the now "corrected"
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* memory size and won't touch it either. This should work
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* for arch/ppc and arch/powerpc. Only Linux board ports in
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* arch/powerpc with bootwrapper support, that recalculate the
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* memory size from the SDRAM controller setup will have to
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* get fixed.
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*/
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gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
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#endif
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#ifdef CONFIG_SYS_SDRAM_BASE
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gd->ram_top = CONFIG_SYS_SDRAM_BASE;
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#endif
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gd->ram_top += get_effective_memsize();
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gd->ram_top = board_get_usable_ram_top(gd->mon_len);
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gd->relocaddr = gd->ram_top;
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debug("Ram top: %08lX\n", (ulong)gd->ram_top);
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
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/*
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* We need to make sure the location we intend to put secondary core
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* boot code is reserved and not used by any part of u-boot
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*/
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if (gd->relocaddr > determine_mp_bootpg(NULL)) {
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gd->relocaddr = determine_mp_bootpg(NULL);
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debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
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}
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#endif
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return 0;
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}
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#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
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static int reserve_logbuffer(void)
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{
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/* reserve kernel log buffer */
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gd->relocaddr -= LOGBUFF_RESERVE;
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debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
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gd->relocaddr);
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return 0;
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}
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#endif
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#ifdef CONFIG_PRAM
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/* reserve protected RAM */
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static int reserve_pram(void)
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{
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ulong reg;
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reg = getenv_ulong("pram", 10, CONFIG_PRAM);
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gd->relocaddr -= (reg << 10); /* size is in kB */
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debug("Reserving %ldk for protected RAM at %08lx\n", reg,
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gd->relocaddr);
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return 0;
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}
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#endif /* CONFIG_PRAM */
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/* Round memory pointer down to next 4 kB limit */
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static int reserve_round_4k(void)
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{
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gd->relocaddr &= ~(4096 - 1);
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return 0;
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}
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#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
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defined(CONFIG_ARM)
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static int reserve_mmu(void)
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{
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/* reserve TLB table */
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gd->arch.tlb_size = PGTABLE_SIZE;
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gd->relocaddr -= gd->arch.tlb_size;
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/* round down to next 64 kB limit */
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gd->relocaddr &= ~(0x10000 - 1);
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gd->arch.tlb_addr = gd->relocaddr;
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debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
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gd->arch.tlb_addr + gd->arch.tlb_size);
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return 0;
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}
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#endif
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#ifdef CONFIG_LCD
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static int reserve_lcd(void)
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{
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#ifdef CONFIG_FB_ADDR
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gd->fb_base = CONFIG_FB_ADDR;
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#else
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/* reserve memory for LCD display (always full pages) */
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gd->relocaddr = lcd_setmem(gd->relocaddr);
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gd->fb_base = gd->relocaddr;
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#endif /* CONFIG_FB_ADDR */
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return 0;
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}
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#endif /* CONFIG_LCD */
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static int reserve_trace(void)
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{
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#ifdef CONFIG_TRACE
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gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
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gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
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debug("Reserving %dk for trace data at: %08lx\n",
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CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
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#endif
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return 0;
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}
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#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
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!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
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!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
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static int reserve_video(void)
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{
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/* reserve memory for video display (always full pages) */
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gd->relocaddr = video_setmem(gd->relocaddr);
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gd->fb_base = gd->relocaddr;
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return 0;
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}
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#endif
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static int reserve_uboot(void)
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{
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/*
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* reserve memory for U-Boot code, data & bss
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* round down to next 4 kB limit
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*/
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gd->relocaddr -= gd->mon_len;
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gd->relocaddr &= ~(4096 - 1);
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#ifdef CONFIG_E500
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/* round down to next 64 kB limit so that IVPR stays aligned */
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gd->relocaddr &= ~(65536 - 1);
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#endif
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debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
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gd->relocaddr);
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gd->start_addr_sp = gd->relocaddr;
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return 0;
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}
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#ifndef CONFIG_SPL_BUILD
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/* reserve memory for malloc() area */
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static int reserve_malloc(void)
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{
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gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
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debug("Reserving %dk for malloc() at: %08lx\n",
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TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
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return 0;
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}
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|
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/* (permanently) allocate a Board Info struct */
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static int reserve_board(void)
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|
{
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|
if (!gd->bd) {
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gd->start_addr_sp -= sizeof(bd_t);
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gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
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memset(gd->bd, '\0', sizeof(bd_t));
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debug("Reserving %zu Bytes for Board Info at: %08lx\n",
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sizeof(bd_t), gd->start_addr_sp);
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}
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return 0;
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}
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#endif
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|
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static int setup_machine(void)
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{
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#ifdef CONFIG_MACH_TYPE
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gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
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#endif
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return 0;
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}
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static int reserve_global_data(void)
|
|
{
|
|
gd->start_addr_sp -= sizeof(gd_t);
|
|
gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
|
|
debug("Reserving %zu Bytes for Global Data at: %08lx\n",
|
|
sizeof(gd_t), gd->start_addr_sp);
|
|
return 0;
|
|
}
|
|
|
|
static int reserve_fdt(void)
|
|
{
|
|
/*
|
|
* If the device tree is sitting immediately above our image then we
|
|
* must relocate it. If it is embedded in the data section, then it
|
|
* will be relocated with other data.
|
|
*/
|
|
if (gd->fdt_blob) {
|
|
gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
|
|
|
|
gd->start_addr_sp -= gd->fdt_size;
|
|
gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
|
|
debug("Reserving %lu Bytes for FDT at: %08lx\n",
|
|
gd->fdt_size, gd->start_addr_sp);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int arch_reserve_stacks(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int reserve_stacks(void)
|
|
{
|
|
/* make stack pointer 16-byte aligned */
|
|
gd->start_addr_sp -= 16;
|
|
gd->start_addr_sp &= ~0xf;
|
|
|
|
/*
|
|
* let the architecture-specific code tailor gd->start_addr_sp and
|
|
* gd->irq_sp
|
|
*/
|
|
return arch_reserve_stacks();
|
|
}
|
|
|
|
static int display_new_sp(void)
|
|
{
|
|
debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
static int setup_board_part1(void)
|
|
{
|
|
bd_t *bd = gd->bd;
|
|
|
|
/*
|
|
* Save local variables to board info struct
|
|
*/
|
|
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
|
|
bd->bi_memsize = gd->ram_size; /* size in bytes */
|
|
|
|
#ifdef CONFIG_SYS_SRAM_BASE
|
|
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
|
|
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
|
|
#endif
|
|
|
|
#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
|
|
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
|
|
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
|
|
#endif
|
|
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
|
|
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
|
|
#endif
|
|
#if defined(CONFIG_MPC83xx)
|
|
bd->bi_immrbar = CONFIG_SYS_IMMR;
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int setup_board_part2(void)
|
|
{
|
|
bd_t *bd = gd->bd;
|
|
|
|
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
|
|
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
|
|
#if defined(CONFIG_CPM2)
|
|
bd->bi_cpmfreq = gd->arch.cpm_clk;
|
|
bd->bi_brgfreq = gd->arch.brg_clk;
|
|
bd->bi_sccfreq = gd->arch.scc_clk;
|
|
bd->bi_vco = gd->arch.vco_out;
|
|
#endif /* CONFIG_CPM2 */
|
|
#if defined(CONFIG_MPC512X)
|
|
bd->bi_ipsfreq = gd->arch.ips_clk;
|
|
#endif /* CONFIG_MPC512X */
|
|
#if defined(CONFIG_MPC5xxx)
|
|
bd->bi_ipbfreq = gd->arch.ipb_clk;
|
|
bd->bi_pcifreq = gd->pci_clk;
|
|
#endif /* CONFIG_MPC5xxx */
|
|
#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
|
|
bd->bi_pcifreq = gd->pci_clk;
|
|
#endif
|
|
#if defined(CONFIG_EXTRA_CLOCK)
|
|
bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
|
|
bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
|
|
bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SYS_EXTBDINFO
|
|
static int setup_board_extra(void)
|
|
{
|
|
bd_t *bd = gd->bd;
|
|
|
|
strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
|
|
strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
|
|
sizeof(bd->bi_r_version));
|
|
|
|
bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
|
|
bd->bi_plb_busfreq = gd->bus_clk;
|
|
#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
|
|
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
|
|
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
|
|
bd->bi_pci_busfreq = get_PCI_freq();
|
|
bd->bi_opbfreq = get_OPB_freq();
|
|
#elif defined(CONFIG_XILINX_405)
|
|
bd->bi_pci_busfreq = get_PCI_freq();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_POST
|
|
static int init_post(void)
|
|
{
|
|
post_bootmode_init();
|
|
post_run(NULL, POST_ROM | post_bootmode_get(0));
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int setup_dram_config(void)
|
|
{
|
|
/* Ram is board specific, so move it to board code ... */
|
|
dram_init_banksize();
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int reloc_fdt(void)
|
|
{
|
|
if (gd->new_fdt) {
|
|
memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
|
|
gd->fdt_blob = gd->new_fdt;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int setup_reloc(void)
|
|
{
|
|
#ifdef CONFIG_SYS_TEXT_BASE
|
|
gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
|
|
#ifdef CONFIG_M68K
|
|
/*
|
|
* On all ColdFire arch cpu, monitor code starts always
|
|
* just after the default vector table location, so at 0x400
|
|
*/
|
|
gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
|
|
#endif
|
|
#endif
|
|
memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
|
|
|
|
debug("Relocation Offset is: %08lx\n", gd->reloc_off);
|
|
debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
|
|
gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
|
|
gd->start_addr_sp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* ARM calls relocate_code from its crt0.S */
|
|
#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
|
|
|
|
static int jump_to_copy(void)
|
|
{
|
|
/*
|
|
* x86 is special, but in a nice way. It uses a trampoline which
|
|
* enables the dcache if possible.
|
|
*
|
|
* For now, other archs use relocate_code(), which is implemented
|
|
* similarly for all archs. When we do generic relocation, hopefully
|
|
* we can make all archs enable the dcache prior to relocation.
|
|
*/
|
|
#if defined(CONFIG_X86) || defined(CONFIG_ARC)
|
|
/*
|
|
* SDRAM and console are now initialised. The final stack can now
|
|
* be setup in SDRAM. Code execution will continue in Flash, but
|
|
* with the stack in SDRAM and Global Data in temporary memory
|
|
* (CPU cache)
|
|
*/
|
|
board_init_f_r_trampoline(gd->start_addr_sp);
|
|
#else
|
|
relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/* Record the board_init_f() bootstage (after arch_cpu_init()) */
|
|
static int mark_bootstage(void)
|
|
{
|
|
bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int initf_dm(void)
|
|
{
|
|
#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
|
|
int ret;
|
|
|
|
ret = dm_init_and_scan(true);
|
|
if (ret)
|
|
return ret;
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Architecture-specific memory reservation */
|
|
__weak int reserve_arch(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
__weak int arch_cpu_init_dm(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static init_fnc_t init_sequence_f[] = {
|
|
#ifdef CONFIG_SANDBOX
|
|
setup_ram_buf,
|
|
#endif
|
|
setup_mon_len,
|
|
#ifdef CONFIG_OF_CONTROL
|
|
fdtdec_setup,
|
|
#endif
|
|
#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
|
|
x86_fsp_init,
|
|
#endif
|
|
#ifdef CONFIG_TRACE
|
|
trace_early_init,
|
|
#endif
|
|
initf_malloc,
|
|
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
|
|
/* TODO: can this go into arch_cpu_init()? */
|
|
probecpu,
|
|
#endif
|
|
arch_cpu_init, /* basic arch cpu dependent setup */
|
|
mark_bootstage,
|
|
initf_dm,
|
|
arch_cpu_init_dm,
|
|
#if defined(CONFIG_BOARD_EARLY_INIT_F)
|
|
board_early_init_f,
|
|
#endif
|
|
/* TODO: can any of this go into arch_cpu_init()? */
|
|
#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
|
|
get_clocks, /* get CPU and bus clocks (etc.) */
|
|
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
|
|
&& !defined(CONFIG_TQM885D)
|
|
adjust_sdram_tbs_8xx,
|
|
#endif
|
|
/* TODO: can we rename this to timer_init()? */
|
|
init_timebase,
|
|
#endif
|
|
#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
|
|
timer_init, /* initialize timer */
|
|
#endif
|
|
#ifdef CONFIG_SYS_ALLOC_DPRAM
|
|
#if !defined(CONFIG_CPM2)
|
|
dpram_init,
|
|
#endif
|
|
#endif
|
|
#if defined(CONFIG_BOARD_POSTCLK_INIT)
|
|
board_postclk_init,
|
|
#endif
|
|
#ifdef CONFIG_FSL_ESDHC
|
|
get_clocks,
|
|
#endif
|
|
#ifdef CONFIG_M68K
|
|
get_clocks,
|
|
#endif
|
|
env_init, /* initialize environment */
|
|
#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
|
|
/* get CPU and bus clocks according to the environment variable */
|
|
get_clocks_866,
|
|
/* adjust sdram refresh rate according to the new clock */
|
|
sdram_adjust_866,
|
|
init_timebase,
|
|
#endif
|
|
init_baud_rate, /* initialze baudrate settings */
|
|
serial_init, /* serial communications setup */
|
|
console_init_f, /* stage 1 init of console */
|
|
#ifdef CONFIG_SANDBOX
|
|
sandbox_early_getopt_check,
|
|
#endif
|
|
#ifdef CONFIG_OF_CONTROL
|
|
fdtdec_prepare_fdt,
|
|
#endif
|
|
display_options, /* say that we are here */
|
|
display_text_info, /* show debugging info if required */
|
|
#if defined(CONFIG_MPC8260)
|
|
prt_8260_rsr,
|
|
prt_8260_clks,
|
|
#endif /* CONFIG_MPC8260 */
|
|
#if defined(CONFIG_MPC83xx)
|
|
prt_83xx_rsr,
|
|
#endif
|
|
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
checkcpu,
|
|
#endif
|
|
print_cpuinfo, /* display cpu info (and speed) */
|
|
#if defined(CONFIG_MPC5xxx)
|
|
prt_mpc5xxx_clks,
|
|
#endif /* CONFIG_MPC5xxx */
|
|
#if defined(CONFIG_DISPLAY_BOARDINFO)
|
|
show_board_info,
|
|
#endif
|
|
INIT_FUNC_WATCHDOG_INIT
|
|
#if defined(CONFIG_MISC_INIT_F)
|
|
misc_init_f,
|
|
#endif
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
|
|
init_func_i2c,
|
|
#endif
|
|
#if defined(CONFIG_HARD_SPI)
|
|
init_func_spi,
|
|
#endif
|
|
announce_dram_init,
|
|
/* TODO: unify all these dram functions? */
|
|
#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
|
|
dram_init, /* configure available RAM banks */
|
|
#endif
|
|
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
init_func_ram,
|
|
#endif
|
|
#ifdef CONFIG_POST
|
|
post_init_f,
|
|
#endif
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
#if defined(CONFIG_SYS_DRAM_TEST)
|
|
testdram,
|
|
#endif /* CONFIG_SYS_DRAM_TEST */
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
|
|
#ifdef CONFIG_POST
|
|
init_post,
|
|
#endif
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
/*
|
|
* Now that we have DRAM mapped and working, we can
|
|
* relocate the code and continue running from DRAM.
|
|
*
|
|
* Reserve memory at end of RAM for (top down in that order):
|
|
* - area that won't get touched by U-Boot and Linux (optional)
|
|
* - kernel log buffer
|
|
* - protected RAM
|
|
* - LCD framebuffer
|
|
* - monitor code
|
|
* - board info struct
|
|
*/
|
|
setup_dest_addr,
|
|
#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
|
|
/* Blackfin u-boot monitor should be on top of the ram */
|
|
reserve_uboot,
|
|
#endif
|
|
#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
|
|
reserve_logbuffer,
|
|
#endif
|
|
#ifdef CONFIG_PRAM
|
|
reserve_pram,
|
|
#endif
|
|
reserve_round_4k,
|
|
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
|
|
defined(CONFIG_ARM)
|
|
reserve_mmu,
|
|
#endif
|
|
#ifdef CONFIG_LCD
|
|
reserve_lcd,
|
|
#endif
|
|
reserve_trace,
|
|
/* TODO: Why the dependency on CONFIG_8xx? */
|
|
#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
|
|
!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
|
|
!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
|
|
reserve_video,
|
|
#endif
|
|
#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
|
|
reserve_uboot,
|
|
#endif
|
|
#ifndef CONFIG_SPL_BUILD
|
|
reserve_malloc,
|
|
reserve_board,
|
|
#endif
|
|
setup_machine,
|
|
reserve_global_data,
|
|
reserve_fdt,
|
|
reserve_arch,
|
|
reserve_stacks,
|
|
setup_dram_config,
|
|
show_dram_config,
|
|
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
setup_board_part1,
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
setup_board_part2,
|
|
#endif
|
|
display_new_sp,
|
|
#ifdef CONFIG_SYS_EXTBDINFO
|
|
setup_board_extra,
|
|
#endif
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
reloc_fdt,
|
|
setup_reloc,
|
|
#if defined(CONFIG_X86) || defined(CONFIG_ARC)
|
|
copy_uboot_to_ram,
|
|
clear_bss,
|
|
do_elf_reloc_fixups,
|
|
#endif
|
|
#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
|
|
jump_to_copy,
|
|
#endif
|
|
NULL,
|
|
};
|
|
|
|
void board_init_f(ulong boot_flags)
|
|
{
|
|
#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
|
|
/*
|
|
* For some archtectures, global data is initialized and used before
|
|
* calling this function. The data should be preserved. For others,
|
|
* CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
|
|
* here to host global data until relocation.
|
|
*/
|
|
gd_t data;
|
|
|
|
gd = &data;
|
|
|
|
/*
|
|
* Clear global data before it is accessed at debug print
|
|
* in initcall_run_list. Otherwise the debug print probably
|
|
* get the wrong vaule of gd->have_console.
|
|
*/
|
|
zero_global_data();
|
|
#endif
|
|
|
|
gd->flags = boot_flags;
|
|
gd->have_console = 0;
|
|
|
|
if (initcall_run_list(init_sequence_f))
|
|
hang();
|
|
|
|
#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
|
|
/* NOTREACHED - jump_to_copy() does not return */
|
|
hang();
|
|
#endif
|
|
}
|
|
|
|
#if defined(CONFIG_X86) || defined(CONFIG_ARC)
|
|
/*
|
|
* For now this code is only used on x86.
|
|
*
|
|
* init_sequence_f_r is the list of init functions which are run when
|
|
* U-Boot is executing from Flash with a semi-limited 'C' environment.
|
|
* The following limitations must be considered when implementing an
|
|
* '_f_r' function:
|
|
* - 'static' variables are read-only
|
|
* - Global Data (gd->xxx) is read/write
|
|
*
|
|
* The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
|
|
* supported). It _should_, if possible, copy global data to RAM and
|
|
* initialise the CPU caches (to speed up the relocation process)
|
|
*
|
|
* NOTE: At present only x86 uses this route, but it is intended that
|
|
* all archs will move to this when generic relocation is implemented.
|
|
*/
|
|
static init_fnc_t init_sequence_f_r[] = {
|
|
init_cache_f_r,
|
|
|
|
NULL,
|
|
};
|
|
|
|
void board_init_f_r(void)
|
|
{
|
|
if (initcall_run_list(init_sequence_f_r))
|
|
hang();
|
|
|
|
/*
|
|
* U-Boot has been copied into SDRAM, the BSS has been cleared etc.
|
|
* Transfer execution from Flash to RAM by calculating the address
|
|
* of the in-RAM copy of board_init_r() and calling it
|
|
*/
|
|
(board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
|
|
|
|
/* NOTREACHED - board_init_r() does not return */
|
|
hang();
|
|
}
|
|
#endif /* CONFIG_X86 */
|
|
|
|
#ifndef CONFIG_X86
|
|
ulong board_init_f_mem(ulong top)
|
|
{
|
|
/* Leave space for the stack we are running with now */
|
|
top -= 0x40;
|
|
|
|
top -= sizeof(struct global_data);
|
|
top = ALIGN(top, 16);
|
|
gd = (struct global_data *)top;
|
|
memset((void *)gd, '\0', sizeof(*gd));
|
|
|
|
#ifdef CONFIG_SYS_MALLOC_F_LEN
|
|
top -= CONFIG_SYS_MALLOC_F_LEN;
|
|
gd->malloc_base = top;
|
|
#endif
|
|
|
|
return top;
|
|
}
|
|
#endif /* !CONFIG_X86 */
|