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![]() Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlmBs2kACgkQykllyylKDCFUGgCgmfop8Ki5+6QI7XQRP7u8nhjw KakAn1sYIRDFQ34AoxmiYa6RTmjepLMv =1Gh3 -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver |
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