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https://github.com/brain-hackers/u-boot-brain
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c7206e9789
This add pinmux configuration for rgmii interface so that network driver can be supported on K2G ICE boards. The pinmux configurations for this are generated using the pinmux tool at https://dev.ti.com/pinmux/app.html#/default As this required some BUFFER_CLASS definitions, same is re-used from the linux defnitions in include/dt-bindings/pinctrl/keystone.h Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
63 lines
1.4 KiB
C
63 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* K2G: Pinmux configuration
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*
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* (C) Copyright 2015
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#ifndef __ASM_ARCH_MUX_K2G_H
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#define __ASM_ARCH_MUX_K2G_H
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#include <common.h>
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#include <asm/io.h>
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#define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
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/*
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* 20:19 - buffer class RW fixed
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* 18 - rxactive (Input enabled for the pad ) 0 - Di; 1 - En;
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* 17 - pulltypesel (0 - PULLDOWN; 1 - PULLUP);
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* 16 - pulluden (0 - PULLUP/DOWN EN; 1 - DI);
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* 3:0 - muxmode (available modes 0:5)
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*/
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#define PIN_IEN (1 << 18) /* pin input enabled */
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#define PIN_PDIS (1 << 16) /* pull up/down disabled */
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#define PIN_PTU (1 << 17) /* pull up */
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#define PIN_PTD (0 << 17) /* pull down */
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#define BUFFER_CLASS_B (0 << 19)
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#define BUFFER_CLASS_C (1 << 19)
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#define BUFFER_CLASS_D (2 << 19)
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#define BUFFER_CLASS_E (3 << 19)
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#define MODE(m) ((m) & 0x7)
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#define MAX_PIN_N 260
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#define MUX_CFG(value, index) \
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__raw_writel(\
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(value) | \
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(__raw_readl(K2G_PADCFG_REG + (index << 2)) & \
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(0x3 << 19)),\
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(K2G_PADCFG_REG + (index << 2))\
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);
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struct pin_cfg {
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int reg_inx;
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u32 val;
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};
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static inline void configure_pin_mux(struct pin_cfg *pin_mux)
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{
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if (!pin_mux)
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return;
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while ((pin_mux->reg_inx >= 0) && (pin_mux->reg_inx < MAX_PIN_N)) {
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MUX_CFG(pin_mux->val, pin_mux->reg_inx);
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pin_mux++;
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}
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}
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#endif /* __ASM_ARCH_MUX_K2G_H */
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