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![Simon Glass](/assets/img/avatar_default.png)
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
856 lines
25 KiB
C
856 lines
25 KiB
C
/*
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* Driver for the TWSI (i2c) controller found on the Marvell
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* orion5x and kirkwood SoC families.
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*
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* Author: Albert Aribaud <albert.u.boot@aribaud.net>
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* Copyright (c) 2010 Albert Aribaud.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <i2c.h>
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#include <linux/errno.h>
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#include <asm/io.h>
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#include <linux/compat.h>
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#ifdef CONFIG_DM_I2C
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#include <dm.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other
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* settings
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*/
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#ifndef CONFIG_DM_I2C
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#if defined(CONFIG_ORION5X)
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#include <asm/arch/orion5x.h>
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#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
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#include <asm/arch/soc.h>
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#elif defined(CONFIG_ARCH_SUNXI)
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#include <asm/arch/i2c.h>
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#else
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#error Driver mvtwsi not supported by SoC or board
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#endif
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#endif /* CONFIG_DM_I2C */
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/*
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* On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
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* always have it.
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*/
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#if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
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#include <asm/arch/i2c.h>
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#endif
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/*
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* TWSI register structure
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*/
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#ifdef CONFIG_ARCH_SUNXI
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struct mvtwsi_registers {
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u32 slave_address;
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u32 xtnd_slave_addr;
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u32 data;
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u32 control;
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u32 status;
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u32 baudrate;
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u32 soft_reset;
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};
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#else
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struct mvtwsi_registers {
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u32 slave_address;
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u32 data;
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u32 control;
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union {
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u32 status; /* When reading */
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u32 baudrate; /* When writing */
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};
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u32 xtnd_slave_addr;
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u32 reserved[2];
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u32 soft_reset;
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};
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#endif
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#ifdef CONFIG_DM_I2C
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struct mvtwsi_i2c_dev {
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/* TWSI Register base for the device */
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struct mvtwsi_registers *base;
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/* Number of the device (determined from cell-index property) */
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int index;
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/* The I2C slave address for the device */
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u8 slaveadd;
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/* The configured I2C speed in Hz */
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uint speed;
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/* The current length of a clock period (depending on speed) */
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uint tick;
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};
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#endif /* CONFIG_DM_I2C */
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/*
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* enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
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* register
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*/
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enum mvtwsi_ctrl_register_fields {
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/* Acknowledge bit */
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MVTWSI_CONTROL_ACK = 0x00000004,
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/* Interrupt flag */
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MVTWSI_CONTROL_IFLG = 0x00000008,
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/* Stop bit */
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MVTWSI_CONTROL_STOP = 0x00000010,
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/* Start bit */
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MVTWSI_CONTROL_START = 0x00000020,
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/* I2C enable */
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MVTWSI_CONTROL_TWSIEN = 0x00000040,
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/* Interrupt enable */
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MVTWSI_CONTROL_INTEN = 0x00000080,
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};
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/*
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* On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
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* on other platforms, it is a normal r/w bit, which is cleared by writing 0.
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*/
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#ifdef CONFIG_SUNXI_GEN_SUN6I
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#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
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#else
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#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
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#endif
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/*
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* enum mvstwsi_status_values - Possible values of I2C controller's status
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* register
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*
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* Only those statuses expected in normal master operation on
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* non-10-bit-address devices are specified.
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*
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* Every status that's unexpected during normal operation (bus errors,
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* arbitration losses, missing ACKs...) is passed back to the caller as an error
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* code.
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*/
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enum mvstwsi_status_values {
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/* START condition transmitted */
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MVTWSI_STATUS_START = 0x08,
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/* Repeated START condition transmitted */
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MVTWSI_STATUS_REPEATED_START = 0x10,
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/* Address + write bit transmitted, ACK received */
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MVTWSI_STATUS_ADDR_W_ACK = 0x18,
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/* Data transmitted, ACK received */
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MVTWSI_STATUS_DATA_W_ACK = 0x28,
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/* Address + read bit transmitted, ACK received */
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MVTWSI_STATUS_ADDR_R_ACK = 0x40,
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/* Address + read bit transmitted, ACK not received */
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MVTWSI_STATUS_ADDR_R_NAK = 0x48,
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/* Data received, ACK transmitted */
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MVTWSI_STATUS_DATA_R_ACK = 0x50,
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/* Data received, ACK not transmitted */
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MVTWSI_STATUS_DATA_R_NAK = 0x58,
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/* No relevant status */
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MVTWSI_STATUS_IDLE = 0xF8,
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};
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/*
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* enum mvstwsi_ack_flags - Determine whether a read byte should be
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* acknowledged or not.
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*/
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enum mvtwsi_ack_flags {
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/* Send NAK after received byte */
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MVTWSI_READ_NAK = 0,
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/* Send ACK after received byte */
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MVTWSI_READ_ACK = 1,
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};
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/*
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* calc_tick() - Calculate the duration of a clock cycle from the I2C speed
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*
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* @speed: The speed in Hz to calculate the clock cycle duration for.
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* @return The duration of a clock cycle in ns.
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*/
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inline uint calc_tick(uint speed)
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{
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/* One tick = the duration of a period at the specified speed in ns (we
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* add 100 ns to be on the safe side) */
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return (1000000000u / speed) + 100;
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}
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#ifndef CONFIG_DM_I2C
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/*
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* twsi_get_base() - Get controller register base for specified adapter
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*
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* @adap: Adapter to get the register base for.
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* @return Register base for the specified adapter.
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*/
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static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
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{
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switch (adap->hwadapnr) {
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#ifdef CONFIG_I2C_MVTWSI_BASE0
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case 0:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE1
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case 1:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE2
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case 2:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE3
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case 3:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE4
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case 4:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE5
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case 5:
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return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
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#endif
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default:
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printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
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break;
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}
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return NULL;
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}
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#endif
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/*
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* enum mvtwsi_error_class - types of I2C errors
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*/
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enum mvtwsi_error_class {
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/* The controller returned a different status than expected */
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MVTWSI_ERROR_WRONG_STATUS = 0x01,
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/* The controller timed out */
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MVTWSI_ERROR_TIMEOUT = 0x02,
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};
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/*
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* mvtwsi_error() - Build I2C return code from error information
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*
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* For debugging purposes, this function packs some information of an occurred
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* error into a return code. These error codes are returned from I2C API
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* functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
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*
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* @ec: The error class of the error (enum mvtwsi_error_class).
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* @lc: The last value of the control register.
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* @ls: The last value of the status register.
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* @es: The expected value of the status register.
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* @return The generated error code.
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*/
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inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
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{
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return ((ec << 24) & 0xFF000000)
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| ((lc << 16) & 0x00FF0000)
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| ((ls << 8) & 0x0000FF00)
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| (es & 0xFF);
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}
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/*
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* twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out.
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*
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* @return Zero if status is as expected, or a non-zero code if either a time
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* out occurred, or the status was not the expected one.
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*/
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static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
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uint tick)
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{
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int control, status;
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int timeout = 1000;
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do {
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control = readl(&twsi->control);
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if (control & MVTWSI_CONTROL_IFLG) {
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status = readl(&twsi->status);
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if (status == expected_status)
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return 0;
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else
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return mvtwsi_error(
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MVTWSI_ERROR_WRONG_STATUS,
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control, status, expected_status);
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}
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ndelay(tick); /* One clock cycle */
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} while (timeout--);
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status = readl(&twsi->status);
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return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
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expected_status);
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}
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/*
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* twsi_start() - Assert a START condition on the bus.
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*
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* This function is used in both single I2C transactions and inside
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* back-to-back transactions (repeated starts).
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*
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* @twsi: The MVTWSI register structure to use.
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* @expected_status: The I2C bus status expected to be asserted after the
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* operation completion.
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* @tick: The duration of a clock cycle at the current I2C speed.
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* @return Zero if status is as expected, or a non-zero code if either a time
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* out occurred or the status was not the expected one.
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*/
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static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
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uint tick)
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{
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/* Assert START */
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writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
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MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
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/* Wait for controller to process START */
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return twsi_wait(twsi, expected_status, tick);
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}
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/*
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* twsi_send() - Send a byte on the I2C bus.
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*
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* The byte may be part of an address byte or data.
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*
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* @twsi: The MVTWSI register structure to use.
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* @byte: The byte to send.
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* @expected_status: The I2C bus status expected to be asserted after the
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* operation completion.
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* @tick: The duration of a clock cycle at the current I2C speed.
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* @return Zero if status is as expected, or a non-zero code if either a time
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* out occurred or the status was not the expected one.
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*/
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static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
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int expected_status, uint tick)
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{
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/* Write byte to data register for sending */
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writel(byte, &twsi->data);
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/* Clear any pending interrupt -- that will cause sending */
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writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
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&twsi->control);
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/* Wait for controller to receive byte, and check ACK */
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return twsi_wait(twsi, expected_status, tick);
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}
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/*
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* twsi_recv() - Receive a byte on the I2C bus.
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*
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* The static variable mvtwsi_control_flags controls whether we ack or nak.
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*
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* @twsi: The MVTWSI register structure to use.
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* @byte: The byte to send.
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* @ack_flag: Flag that determines whether the received byte should
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* be acknowledged by the controller or not (sent ACK/NAK).
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* @tick: The duration of a clock cycle at the current I2C speed.
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* @return Zero if status is as expected, or a non-zero code if either a time
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* out occurred or the status was not the expected one.
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*/
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static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
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uint tick)
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{
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int expected_status, status, control;
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/* Compute expected status based on passed ACK flag */
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expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
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MVTWSI_STATUS_DATA_R_NAK;
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/* Acknowledge *previous state*, and launch receive */
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control = MVTWSI_CONTROL_TWSIEN;
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control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
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writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
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/* Wait for controller to receive byte, and assert ACK or NAK */
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status = twsi_wait(twsi, expected_status, tick);
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/* If we did receive the expected byte, store it */
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if (status == 0)
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*byte = readl(&twsi->data);
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return status;
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}
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/*
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* twsi_stop() - Assert a STOP condition on the bus.
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*
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* This function is also used to force the bus back to idle state (SDA =
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* SCL = 1).
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*
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* @twsi: The MVTWSI register structure to use.
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* @tick: The duration of a clock cycle at the current I2C speed.
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* @return Zero if the operation succeeded, or a non-zero code if a time out
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* occurred.
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*/
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static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
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{
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int control, stop_status;
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int status = 0;
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int timeout = 1000;
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/* Assert STOP */
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control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
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writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
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/* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */
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do {
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stop_status = readl(&twsi->status);
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if (stop_status == MVTWSI_STATUS_IDLE)
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break;
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ndelay(tick); /* One clock cycle */
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} while (timeout--);
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control = readl(&twsi->control);
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if (stop_status != MVTWSI_STATUS_IDLE)
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status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
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control, status, MVTWSI_STATUS_IDLE);
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return status;
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}
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/*
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* twsi_calc_freq() - Compute I2C frequency depending on m and n parameters.
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*
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* @n: Parameter 'n' for the frequency calculation algorithm.
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* @m: Parameter 'm' for the frequency calculation algorithm.
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* @return The I2C frequency corresponding to the passed m and n parameters.
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*/
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static uint twsi_calc_freq(const int n, const int m)
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{
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#ifdef CONFIG_ARCH_SUNXI
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return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
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#else
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return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
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#endif
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}
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/*
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* twsi_reset() - Reset the I2C controller.
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*
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* Resetting the controller also resets the baud rate and slave address, hence
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* they must be re-established after the reset.
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*
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* @twsi: The MVTWSI register structure to use.
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*/
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static void twsi_reset(struct mvtwsi_registers *twsi)
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{
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/* Reset controller */
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writel(0, &twsi->soft_reset);
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/* Wait 2 ms -- this is what the Marvell LSP does */
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udelay(20000);
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}
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/*
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* __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller.
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*
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* This function sets baud rate to the highest possible value that does not
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* exceed the requested rate.
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*
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* @twsi: The MVTWSI register structure to use.
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* @requested_speed: The desired frequency the controller should run at
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* in Hz.
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* @return The actual frequency the controller was configured to.
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*/
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static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
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uint requested_speed)
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{
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uint tmp_speed, highest_speed, n, m;
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uint baud = 0x44; /* Baud rate after controller reset */
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highest_speed = 0;
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/* Successively try m, n combinations, and use the combination
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* resulting in the largest speed that's not above the requested
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* speed */
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for (n = 0; n < 8; n++) {
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for (m = 0; m < 16; m++) {
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tmp_speed = twsi_calc_freq(n, m);
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if ((tmp_speed <= requested_speed) &&
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(tmp_speed > highest_speed)) {
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highest_speed = tmp_speed;
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baud = (m << 3) | n;
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}
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}
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}
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writel(baud, &twsi->baudrate);
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/* Wait for controller for one tick */
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#ifdef CONFIG_DM_I2C
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ndelay(calc_tick(highest_speed));
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#else
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ndelay(10000);
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#endif
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return highest_speed;
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}
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/*
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* __twsi_i2c_init() - Initialize the I2C controller.
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*
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* @twsi: The MVTWSI register structure to use.
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* @speed: The initial frequency the controller should run at
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* in Hz.
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* @slaveadd: The I2C address to be set for the I2C master.
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* @actual_speed: A output parameter that receives the actual frequency
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* in Hz the controller was set to by the function.
|
|
* @return Zero if the operation succeeded, or a non-zero code if a time out
|
|
* occurred.
|
|
*/
|
|
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
|
|
int slaveadd, uint *actual_speed)
|
|
{
|
|
/* Reset controller */
|
|
twsi_reset(twsi);
|
|
/* Set speed */
|
|
*actual_speed = __twsi_i2c_set_bus_speed(twsi, speed);
|
|
/* Set slave address; even though we don't use it */
|
|
writel(slaveadd, &twsi->slave_address);
|
|
writel(0, &twsi->xtnd_slave_addr);
|
|
/* Assert STOP, but don't care for the result */
|
|
#ifdef CONFIG_DM_I2C
|
|
(void) twsi_stop(twsi, calc_tick(*actual_speed));
|
|
#else
|
|
(void) twsi_stop(twsi, 10000);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* i2c_begin() - Start a I2C transaction.
|
|
*
|
|
* Begin a I2C transaction with a given expected start status and chip address.
|
|
* A START is asserted, and the address byte is sent to the I2C controller. The
|
|
* expected address status will be derived from the direction bit (bit 0) of
|
|
* the address byte.
|
|
*
|
|
* @twsi: The MVTWSI register structure to use.
|
|
* @expected_start_status: The I2C status the controller is expected to
|
|
* assert after the address byte was sent.
|
|
* @addr: The address byte to be sent.
|
|
* @tick: The duration of a clock cycle at the current
|
|
* I2C speed.
|
|
* @return Zero if the operation succeeded, or a non-zero code if a time out or
|
|
* unexpected I2C status occurred.
|
|
*/
|
|
static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
|
|
u8 addr, uint tick)
|
|
{
|
|
int status, expected_addr_status;
|
|
|
|
/* Compute the expected address status from the direction bit in
|
|
* the address byte */
|
|
if (addr & 1) /* Reading */
|
|
expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
|
|
else /* Writing */
|
|
expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
|
|
/* Assert START */
|
|
status = twsi_start(twsi, expected_start_status, tick);
|
|
/* Send out the address if the start went well */
|
|
if (status == 0)
|
|
status = twsi_send(twsi, addr, expected_addr_status, tick);
|
|
/* Return 0, or the status of the first failure */
|
|
return status;
|
|
}
|
|
|
|
/*
|
|
* __twsi_i2c_probe_chip() - Probe the given I2C chip address.
|
|
*
|
|
* This function begins a I2C read transaction, does a dummy read and NAKs; if
|
|
* the procedure succeeds, the chip is considered to be present.
|
|
*
|
|
* @twsi: The MVTWSI register structure to use.
|
|
* @chip: The chip address to probe.
|
|
* @tick: The duration of a clock cycle at the current I2C speed.
|
|
* @return Zero if the operation succeeded, or a non-zero code if a time out or
|
|
* unexpected I2C status occurred.
|
|
*/
|
|
static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
|
|
uint tick)
|
|
{
|
|
u8 dummy_byte;
|
|
int status;
|
|
|
|
/* Begin i2c read */
|
|
status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
|
|
/* Dummy read was accepted: receive byte, but NAK it. */
|
|
if (status == 0)
|
|
status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
|
|
/* Stop transaction */
|
|
twsi_stop(twsi, tick);
|
|
/* Return 0, or the status of the first failure */
|
|
return status;
|
|
}
|
|
|
|
/*
|
|
* __twsi_i2c_read() - Read data from a I2C chip.
|
|
*
|
|
* This function begins a I2C write transaction, and transmits the address
|
|
* bytes; then begins a I2C read transaction, and receives the data bytes.
|
|
*
|
|
* NOTE: Some devices want a stop right before the second start, while some
|
|
* will choke if it is there. Since deciding this is not yet supported in
|
|
* higher level APIs, we need to make a decision here, and for the moment that
|
|
* will be a repeated start without a preceding stop.
|
|
*
|
|
* @twsi: The MVTWSI register structure to use.
|
|
* @chip: The chip address to read from.
|
|
* @addr: The address bytes to send.
|
|
* @alen: The length of the address bytes in bytes.
|
|
* @data: The buffer to receive the data read from the chip (has to have
|
|
* a size of at least 'length' bytes).
|
|
* @length: The amount of data to be read from the chip in bytes.
|
|
* @tick: The duration of a clock cycle at the current I2C speed.
|
|
* @return Zero if the operation succeeded, or a non-zero code if a time out or
|
|
* unexpected I2C status occurred.
|
|
*/
|
|
static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
|
|
u8 *addr, int alen, uchar *data, int length,
|
|
uint tick)
|
|
{
|
|
int status = 0;
|
|
int stop_status;
|
|
int expected_start = MVTWSI_STATUS_START;
|
|
|
|
if (alen > 0) {
|
|
/* Begin i2c write to send the address bytes */
|
|
status = i2c_begin(twsi, expected_start, (chip << 1), tick);
|
|
/* Send address bytes */
|
|
while ((status == 0) && alen--)
|
|
status = twsi_send(twsi, addr[alen],
|
|
MVTWSI_STATUS_DATA_W_ACK, tick);
|
|
/* Send repeated STARTs after the initial START */
|
|
expected_start = MVTWSI_STATUS_REPEATED_START;
|
|
}
|
|
/* Begin i2c read to receive data bytes */
|
|
if (status == 0)
|
|
status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
|
|
/* Receive actual data bytes; set NAK if we if we have nothing more to
|
|
* read */
|
|
while ((status == 0) && length--)
|
|
status = twsi_recv(twsi, data++,
|
|
length > 0 ?
|
|
MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
|
|
/* Stop transaction */
|
|
stop_status = twsi_stop(twsi, tick);
|
|
/* Return 0, or the status of the first failure */
|
|
return status != 0 ? status : stop_status;
|
|
}
|
|
|
|
/*
|
|
* __twsi_i2c_write() - Send data to a I2C chip.
|
|
*
|
|
* This function begins a I2C write transaction, and transmits the address
|
|
* bytes; then begins a new I2C write transaction, and sends the data bytes.
|
|
*
|
|
* @twsi: The MVTWSI register structure to use.
|
|
* @chip: The chip address to read from.
|
|
* @addr: The address bytes to send.
|
|
* @alen: The length of the address bytes in bytes.
|
|
* @data: The buffer containing the data to be sent to the chip.
|
|
* @length: The length of data to be sent to the chip in bytes.
|
|
* @tick: The duration of a clock cycle at the current I2C speed.
|
|
* @return Zero if the operation succeeded, or a non-zero code if a time out or
|
|
* unexpected I2C status occurred.
|
|
*/
|
|
static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
|
|
u8 *addr, int alen, uchar *data, int length,
|
|
uint tick)
|
|
{
|
|
int status, stop_status;
|
|
|
|
/* Begin i2c write to send first the address bytes, then the
|
|
* data bytes */
|
|
status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
|
|
/* Send address bytes */
|
|
while ((status == 0) && (alen-- > 0))
|
|
status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
|
|
tick);
|
|
/* Send data bytes */
|
|
while ((status == 0) && (length-- > 0))
|
|
status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
|
|
tick);
|
|
/* Stop transaction */
|
|
stop_status = twsi_stop(twsi, tick);
|
|
/* Return 0, or the status of the first failure */
|
|
return status != 0 ? status : stop_status;
|
|
}
|
|
|
|
#ifndef CONFIG_DM_I2C
|
|
static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
|
|
int slaveadd)
|
|
{
|
|
struct mvtwsi_registers *twsi = twsi_get_base(adap);
|
|
__twsi_i2c_init(twsi, speed, slaveadd, NULL);
|
|
}
|
|
|
|
static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
|
|
uint requested_speed)
|
|
{
|
|
struct mvtwsi_registers *twsi = twsi_get_base(adap);
|
|
__twsi_i2c_set_bus_speed(twsi, requested_speed);
|
|
return 0;
|
|
}
|
|
|
|
static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
|
|
{
|
|
struct mvtwsi_registers *twsi = twsi_get_base(adap);
|
|
return __twsi_i2c_probe_chip(twsi, chip, 10000);
|
|
}
|
|
|
|
static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
|
|
int alen, uchar *data, int length)
|
|
{
|
|
struct mvtwsi_registers *twsi = twsi_get_base(adap);
|
|
u8 addr_bytes[4];
|
|
|
|
addr_bytes[0] = (addr >> 0) & 0xFF;
|
|
addr_bytes[1] = (addr >> 8) & 0xFF;
|
|
addr_bytes[2] = (addr >> 16) & 0xFF;
|
|
addr_bytes[3] = (addr >> 24) & 0xFF;
|
|
|
|
return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
|
|
10000);
|
|
}
|
|
|
|
static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
|
|
int alen, uchar *data, int length)
|
|
{
|
|
struct mvtwsi_registers *twsi = twsi_get_base(adap);
|
|
u8 addr_bytes[4];
|
|
|
|
addr_bytes[0] = (addr >> 0) & 0xFF;
|
|
addr_bytes[1] = (addr >> 8) & 0xFF;
|
|
addr_bytes[2] = (addr >> 16) & 0xFF;
|
|
addr_bytes[3] = (addr >> 24) & 0xFF;
|
|
|
|
return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
|
|
10000);
|
|
}
|
|
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE0
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
|
|
#endif
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE1
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
|
|
|
|
#endif
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE2
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
|
|
|
|
#endif
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE3
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
|
|
|
|
#endif
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE4
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
|
|
|
|
#endif
|
|
#ifdef CONFIG_I2C_MVTWSI_BASE5
|
|
U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
|
|
twsi_i2c_read, twsi_i2c_write,
|
|
twsi_i2c_set_bus_speed,
|
|
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
|
|
|
|
#endif
|
|
#else /* CONFIG_DM_I2C */
|
|
|
|
static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
|
|
u32 chip_flags)
|
|
{
|
|
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
|
|
return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
|
|
}
|
|
|
|
static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
|
|
{
|
|
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
|
|
|
|
dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
|
|
dev->tick = calc_tick(dev->speed);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mvtwsi_i2c_ofdata_to_platdata(struct udevice *bus)
|
|
{
|
|
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
|
|
|
|
dev->base = devfdt_get_addr_ptr(bus);
|
|
|
|
if (!dev->base)
|
|
return -ENOMEM;
|
|
|
|
dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
|
|
"cell-index", -1);
|
|
dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
|
|
"u-boot,i2c-slave-addr", 0x0);
|
|
dev->speed = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
|
|
"clock-frequency", 100000);
|
|
return 0;
|
|
}
|
|
|
|
static int mvtwsi_i2c_probe(struct udevice *bus)
|
|
{
|
|
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
|
|
uint actual_speed;
|
|
|
|
__twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
|
|
dev->speed = actual_speed;
|
|
dev->tick = calc_tick(dev->speed);
|
|
return 0;
|
|
}
|
|
|
|
static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
|
|
{
|
|
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
|
|
struct i2c_msg *dmsg, *omsg, dummy;
|
|
|
|
memset(&dummy, 0, sizeof(struct i2c_msg));
|
|
|
|
/* We expect either two messages (one with an offset and one with the
|
|
* actual data) or one message (just data or offset/data combined) */
|
|
if (nmsgs > 2 || nmsgs == 0) {
|
|
debug("%s: Only one or two messages are supported.", __func__);
|
|
return -1;
|
|
}
|
|
|
|
omsg = nmsgs == 1 ? &dummy : msg;
|
|
dmsg = nmsgs == 1 ? msg : msg + 1;
|
|
|
|
if (dmsg->flags & I2C_M_RD)
|
|
return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf,
|
|
omsg->len, dmsg->buf, dmsg->len,
|
|
dev->tick);
|
|
else
|
|
return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf,
|
|
omsg->len, dmsg->buf, dmsg->len,
|
|
dev->tick);
|
|
}
|
|
|
|
static const struct dm_i2c_ops mvtwsi_i2c_ops = {
|
|
.xfer = mvtwsi_i2c_xfer,
|
|
.probe_chip = mvtwsi_i2c_probe_chip,
|
|
.set_bus_speed = mvtwsi_i2c_set_bus_speed,
|
|
};
|
|
|
|
static const struct udevice_id mvtwsi_i2c_ids[] = {
|
|
{ .compatible = "marvell,mv64xxx-i2c", },
|
|
{ .compatible = "marvell,mv78230-i2c", },
|
|
{ .compatible = "allwinner,sun6i-a31-i2c", },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(i2c_mvtwsi) = {
|
|
.name = "i2c_mvtwsi",
|
|
.id = UCLASS_I2C,
|
|
.of_match = mvtwsi_i2c_ids,
|
|
.probe = mvtwsi_i2c_probe,
|
|
.ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
|
|
.priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
|
|
.ops = &mvtwsi_i2c_ops,
|
|
};
|
|
#endif /* CONFIG_DM_I2C */
|