u-boot-brain/arch/powerpc/cpu/mpc8xxx/ddr
york 9490ff4864 powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
..
common_timing_params.h powerpc/8xxx: Enable DDR3 RDIMM support 2010-07-26 13:16:10 -05:00
ctrl_regs.c powerpc/8xxx: Enable DDR3 RDIMM support 2010-07-26 13:16:10 -05:00
ddr1_dimm_params.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
ddr2_dimm_params.c Enabled support for Rev 1.3 SPD for DDR2 DIMMs 2010-05-12 04:54:30 -05:00
ddr3_dimm_params.c powerpc/8xxx: Enable DDR3 RDIMM support 2010-07-26 13:16:10 -05:00
ddr.h powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 2010-07-26 13:16:09 -05:00
lc_common_dimm_params.c powerpc/8xxx: Enable DDR3 RDIMM support 2010-07-26 13:16:10 -05:00
main.c powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 2010-07-26 13:16:09 -05:00
Makefile Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
options.c powerpc/8xxx: Enabled address hashing for 85xx 2010-07-26 13:16:09 -05:00
util.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00