mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 21:56:21 +09:00
f73cfb4d0d
The pin data are implemented for old SoCs to specify the bit shift of the IECTRL register. They are not wortwhile given the required memory footprint. Delete all the pin data and enable all bits of the IECTRL register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
156 lines
5.8 KiB
C
156 lines
5.8 KiB
C
/*
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include "pinctrl-uniphier.h"
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static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
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static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9};
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static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
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static const int emmc_dat8_muxvals[] = {9, 9, 9, 9};
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static const unsigned ether_mii_pins[] = {143, 144, 145, 146, 147, 148, 149,
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150, 151, 152, 153, 154, 155, 156,
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158, 159, 199, 200, 201, 202};
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static const int ether_mii_muxvals[] = {8, 8, 8, 8, 10, 10, 10, 10, 10, 10, 10,
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10, 10, 10, 10, 10, 12, 12, 12, 12};
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static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
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150, 151, 152, 153, 154, 155, 156,
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157, 158};
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static const int ether_rgmii_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
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8, 8, 8, 8};
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static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
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150, 152, 154, 155, 158};
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static const int ether_rmii_muxvals[] = {8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9};
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static const unsigned i2c0_pins[] = {109, 110};
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static const int i2c0_muxvals[] = {8, 8};
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static const unsigned i2c1_pins[] = {111, 112};
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static const int i2c1_muxvals[] = {8, 8};
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static const unsigned i2c2_pins[] = {171, 172};
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static const int i2c2_muxvals[] = {8, 8};
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static const unsigned i2c3_pins[] = {159, 160};
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static const int i2c3_muxvals[] = {8, 8};
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static const unsigned i2c5_pins[] = {183, 184};
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static const int i2c5_muxvals[] = {11, 11};
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static const unsigned i2c6_pins[] = {185, 186};
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static const int i2c6_muxvals[] = {11, 11};
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static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41,
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42, 43, 44, 45, 46};
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static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
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static const unsigned nand_cs1_pins[] = {37, 38};
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static const int nand_cs1_muxvals[] = {8, 8};
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static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
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static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};
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static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
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11, 12, 13};
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static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
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8};
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static const unsigned system_bus_cs1_pins[] = {14};
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static const int system_bus_cs1_muxvals[] = {8};
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static const unsigned uart0_pins[] = {217, 218};
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static const int uart0_muxvals[] = {8, 8};
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static const unsigned uart0b_pins[] = {179, 180};
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static const int uart0b_muxvals[] = {10, 10};
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static const unsigned uart1_pins[] = {115, 116};
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static const int uart1_muxvals[] = {8, 8};
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static const unsigned uart2_pins[] = {113, 114};
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static const int uart2_muxvals[] = {8, 8};
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static const unsigned uart3_pins[] = {219, 220};
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static const int uart3_muxvals[] = {8, 8};
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static const unsigned uart3b_pins[] = {181, 182};
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static const int uart3b_muxvals[] = {10, 10};
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static const unsigned usb0_pins[] = {56, 57};
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static const int usb0_muxvals[] = {8, 8};
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static const unsigned usb1_pins[] = {58, 59};
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static const int usb1_muxvals[] = {8, 8};
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static const unsigned usb2_pins[] = {60, 61};
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static const int usb2_muxvals[] = {8, 8};
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static const unsigned usb3_pins[] = {62, 63};
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static const int usb3_muxvals[] = {8, 8};
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static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {
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UNIPHIER_PINCTRL_GROUP_SPL(emmc),
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UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
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UNIPHIER_PINCTRL_GROUP(ether_mii),
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UNIPHIER_PINCTRL_GROUP(ether_rgmii),
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UNIPHIER_PINCTRL_GROUP(ether_rmii),
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UNIPHIER_PINCTRL_GROUP(i2c0),
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UNIPHIER_PINCTRL_GROUP(i2c1),
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UNIPHIER_PINCTRL_GROUP(i2c2),
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UNIPHIER_PINCTRL_GROUP(i2c3),
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UNIPHIER_PINCTRL_GROUP(i2c5),
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UNIPHIER_PINCTRL_GROUP(i2c6),
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UNIPHIER_PINCTRL_GROUP(nand),
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UNIPHIER_PINCTRL_GROUP(nand_cs1),
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UNIPHIER_PINCTRL_GROUP(sd),
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UNIPHIER_PINCTRL_GROUP(system_bus),
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UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
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UNIPHIER_PINCTRL_GROUP_SPL(uart0),
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UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
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UNIPHIER_PINCTRL_GROUP_SPL(uart1),
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UNIPHIER_PINCTRL_GROUP_SPL(uart2),
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UNIPHIER_PINCTRL_GROUP_SPL(uart3),
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UNIPHIER_PINCTRL_GROUP_SPL(uart3b),
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UNIPHIER_PINCTRL_GROUP(usb0),
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UNIPHIER_PINCTRL_GROUP(usb1),
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UNIPHIER_PINCTRL_GROUP(usb2),
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UNIPHIER_PINCTRL_GROUP(usb3),
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};
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static const char * const uniphier_pxs2_functions[] = {
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UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
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UNIPHIER_PINMUX_FUNCTION(ether_mii),
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UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
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UNIPHIER_PINMUX_FUNCTION(ether_rmii),
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UNIPHIER_PINMUX_FUNCTION(i2c0),
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UNIPHIER_PINMUX_FUNCTION(i2c1),
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UNIPHIER_PINMUX_FUNCTION(i2c2),
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UNIPHIER_PINMUX_FUNCTION(i2c3),
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UNIPHIER_PINMUX_FUNCTION(i2c5),
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UNIPHIER_PINMUX_FUNCTION(i2c6),
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UNIPHIER_PINMUX_FUNCTION(nand),
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UNIPHIER_PINMUX_FUNCTION(sd),
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UNIPHIER_PINMUX_FUNCTION(system_bus),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
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UNIPHIER_PINMUX_FUNCTION(usb0),
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UNIPHIER_PINMUX_FUNCTION(usb1),
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UNIPHIER_PINMUX_FUNCTION(usb2),
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UNIPHIER_PINMUX_FUNCTION(usb3),
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};
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static struct uniphier_pinctrl_socdata uniphier_pxs2_pinctrl_socdata = {
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.groups = uniphier_pxs2_groups,
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.groups_count = ARRAY_SIZE(uniphier_pxs2_groups),
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.functions = uniphier_pxs2_functions,
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.functions_count = ARRAY_SIZE(uniphier_pxs2_functions),
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.caps = UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE,
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};
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static int uniphier_pxs2_pinctrl_probe(struct udevice *dev)
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{
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return uniphier_pinctrl_probe(dev, &uniphier_pxs2_pinctrl_socdata);
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}
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static const struct udevice_id uniphier_pxs2_pinctrl_match[] = {
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{ .compatible = "socionext,uniphier-pxs2-pinctrl" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(uniphier_pxs2_pinctrl) = {
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.name = "uniphier-pxs2-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(uniphier_pxs2_pinctrl_match),
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.probe = uniphier_pxs2_pinctrl_probe,
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.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
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.ops = &uniphier_pinctrl_ops,
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};
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