Siarhei Siamashka 935758b1d5 sunxi: dram: Derive write recovery delay from DRAM clock speed ... The write recovery time is 15ns for all JEDEC DDR3 speed bins. And instead of hardcoding it to 10 cycles, it is possible to set tighter timings based on accurate calculations. For example, DRAM clock frequencies up to 533MHz need only 8 cycles for write recovery. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>		2014-08-12 08:42:33 +02:00
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cpu	sunxi: dram: Derive write recovery delay from DRAM clock speed	2014-08-12 08:42:33 +02:00
dts	Merge remote-tracking branch 'u-boot-samsung/master'	2014-07-01 20:52:51 +02:00
imx-common	Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'	2014-06-30 23:00:34 +02:00
include/asm	sunxi: dram: Configurable DQS gating window mode and delay	2014-08-12 08:42:33 +02:00
lib	arm: Support pre-relocation malloc()	2014-08-04 05:24:35 -06:00
config.mk	kconfig: delete redundant CONFIG_${ARCH} definition	2014-07-30 14:42:02 -04:00
Kconfig	kconfig: add board Kconfig and defconfig files	2014-07-30 08:48:01 -04:00