mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011
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* eInfochips Ltd. <www.einfochips.com>
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* Written-by: Ajay Bhargav <contact@8051projects.net>
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*
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* (C) Copyright 2010
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* Marvell Semiconductor <www.marvell.com>
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*/
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#ifndef __MVGPIO_H__
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#define __MVGPIO_H__
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#include <common.h>
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/*
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* GPIO Register map for Marvell SOCs
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*/
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struct gpio_reg {
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u32 gplr; /* Pin Level Register - 0x0000 */
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u32 pad0[2];
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u32 gpdr; /* Pin Direction Register - 0x000C */
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u32 pad1[2];
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u32 gpsr; /* Pin Output Set Register - 0x0018 */
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u32 pad2[2];
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u32 gpcr; /* Pin Output Clear Register - 0x0024 */
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u32 pad3[2];
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u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */
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u32 pad4[2];
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u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */
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u32 pad5[2];
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u32 gedr; /* Edge Detect Status Register - 0x0048 */
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u32 pad6[2];
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u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */
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u32 pad7[2];
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u32 gcdr; /* Bitwise Clear of GPIO Direction Register - 0x0060 */
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u32 pad8[2];
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u32 gsrer; /* Bitwise Set of Rising-Edge Detect Enable
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Register - 0x006C */
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u32 pad9[2];
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u32 gcrer; /* Bitwise Clear of Rising-Edge Detect Enable
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Register - 0x0078 */
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u32 pad10[2];
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u32 gsfer; /* Bitwise Set of Falling-Edge Detect Enable
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Register - 0x0084 */
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u32 pad11[2];
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u32 gcfer; /* Bitwise Clear of Falling-Edge Detect Enable
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Register - 0x0090 */
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u32 pad12[2];
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u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */
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};
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#endif /* __MVGPIO_H__ */
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