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https://github.com/brain-hackers/u-boot-brain
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![Wolfgang Denk](/assets/img/avatar_default.png)
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini Don't remove some copyrights by accident] Signed-off-by: Tom Rini <trini@ti.com>
273 lines
8.1 KiB
C
273 lines
8.1 KiB
C
/**
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* @date April 18, 2005
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*
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* @brief IXP400 NPE Microcode Image file
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*
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* This file was generated by the IxNpeDlImageGen tool.
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* It contains a NPE microcode image suitable for use
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* with the NPE Downloader (IxNpeDl) component in the
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* IXP400 Access Driver software library.
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* SPDX-License-Identifier: BSD-3-Clause
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* @par
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* -- End of Copyright Notice --
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*/
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/**
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* @defgroup IxNpeMicrocode IXP400 NPE Microcode Image Library
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*
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* @brief Library containing a set of NPE firmware images, for use
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* with NPE Downloader s/w component
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*
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* @{
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*/
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/**
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* @def IX_NPE_IMAGE_INCLUDE
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*
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* @brief Wrap the following Image identifiers with "#if IX_NPE_IMAGE_INCLUDE ... #endif" to include the image in the library
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*/
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#define IX_NPE_IMAGE_INCLUDE 1
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/**
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* @def IX_NPE_IMAGE_OMIT
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*
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* @brief Wrap the following Image identifiers with "#if IX_NPE_IMAGE_OMIT ... #endif" to OMIT the image from the library
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*/
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#define IX_NPE_IMAGE_OMIT 0
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_HSS0
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*
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* @brief NPE Image Id for NPE-A with HSS-0 Only feature. It supports 32 channelized and 4 packetized.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS0 0x00010000
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
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*
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* @brief NPE Image Id for NPE-A with HSS-0 and ATM feature. For HSS, it supports 16/32 channelized and 4/0 packetized. For ATM, it supports AAL5, AAL0 and OAM for UTOPIA SPHY, 1 logical port, 32 VCs. It also has Fast Path support.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT 0x00020000
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
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*
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* @brief NPE Image Id for NPE-A with HSS-0 and ATM feature. For HSS, it supports 16/32 channelized and 4/0 packetized. For ATM, it supports AAL5, AAL0 and OAM for UTOPIA MPHY, 1 logical port, 32 VCs. It also has Fast Path support.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT 0x00030000
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
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*
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* @brief NPE Image Id for NPE-A with ATM-Only feature. It supports AAL5, AAL0 and OAM for UTOPIA MPHY, 12 logical ports, 32 VCs. It also has Fast Path support.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT 0x00040000
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_DMA
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*
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* @brief NPE Image Id for NPE-A with DMA-Only feature.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_DMA 0x00150100
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
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*
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* @brief NPE Image Id for NPE-A with HSS-0 and HSS-1 feature. Each HSS port supports 32 channelized and 4 packetized.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT 0x00090000
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_ETH
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*
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* @brief NPE Image Id for NPE-A with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH 0x10800200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
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*
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* @brief NPE Image Id for NPE-A with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL 0x10800200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
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*
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* @brief NPE Image Id for NPE-A with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x10810200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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*
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* @brief NPE Image Id for NPE-A with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
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*/
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#define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x10820200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEB_ETH
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*
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* @brief NPE Image Id for NPE-B with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEB_ETH 0x01000200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
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*
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* @brief NPE Image Id for NPE-B with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL 0x01000200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
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*
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* @brief NPE Image Id for NPE-B with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
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*/
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#define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x01010200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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*
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* @brief NPE Image Id for NPE-B with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
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*/
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#define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x01020200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEB_DMA
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*
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* @brief NPE Image Id for NPE-B with DMA-Only feature.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEB_DMA 0x01020100
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEC_ETH
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*
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* @brief NPE Image Id for NPE-C with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEC_ETH 0x02000200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
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*
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* @brief NPE Image Id for NPE-C with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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*/
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#define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL 0x02000200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
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*
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* @brief NPE Image Id for NPE-C with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
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*/
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#define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x02010200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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*
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* @brief NPE Image Id for NPE-C with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
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*/
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#define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x02020200
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#endif
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#if IX_NPE_IMAGE_INCLUDE
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/**
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* @def IX_NPEDL_NPEIMAGE_NPEC_DMA
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*
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* @brief NPE Image Id for NPE-C with DMA-Only feature.
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*/
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#define IX_NPEDL_NPEIMAGE_NPEC_DMA 0x02080100
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#endif
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/* Number of NPE firmware images in this library */
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#define IX_NPE_MICROCODE_AVAILABLE_VERSIONS_COUNT 17
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/* Location of Microcode Images */
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#ifdef IX_NPE_MICROCODE_FIRMWARE_INCLUDED
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#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE
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extern UINT32* ixNpeMicrocode_binaryArray;
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#else
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extern unsigned IxNpeMicrocode_array[];
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#endif
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#endif
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/*
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* sr: undef all but the bare minimum to reduce flash usage for U-Boot
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*/
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#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0
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#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
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#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
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#undef IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
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#undef IX_NPEDL_NPEIMAGE_NPEA_DMA
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#undef IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
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#undef IX_NPEDL_NPEIMAGE_NPEA_ETH
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#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
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#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
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#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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#undef IX_NPEDL_NPEIMAGE_NPEB_ETH
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#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
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/* #undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */
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#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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#undef IX_NPEDL_NPEIMAGE_NPEB_DMA
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#undef IX_NPEDL_NPEIMAGE_NPEC_ETH
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#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
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/* #undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */
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#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
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#undef IX_NPEDL_NPEIMAGE_NPEC_DMA
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/**
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* @} defgroup IxNpeMicrocode
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*/
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