mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 12:46:17 +09:00
92a190aaab
With this change driver will benefit from existing phylib and thus custom phy functionality implemented in the driver will go away: * Instantiation of the driver is now much shorter - 2 parameters instead of 4. * Simplified phy management/functoinality in driver is replaced with rich functionality of phylib. * Support of custom phy initialization is now done with existing "board_phy_config". Note that after this change some previously used config options (driver-specific PHY configuration) will be obsolete and they are simply substituted with similar options of phylib. For example: * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled by default. * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise automatically the first discovered on MDIO bus phy will be used I believe there's no need now in "doc/README.designware_eth" because user only needs to instantiate the driver with "designware_initialize" whose prototype exists in "include/netdev.h". Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Amit Virdi <amit.virdi@st.com> Cc: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
79 lines
1.7 KiB
C
79 lines
1.7 KiB
C
/*
|
|
* (C) Copyright 2009
|
|
* Ryan Chen, ST Micoelectronics, ryan.chen@st.com.
|
|
* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <miiphy.h>
|
|
#include <netdev.h>
|
|
#include <nand.h>
|
|
#include <asm/io.h>
|
|
#include <linux/mtd/fsmc_nand.h>
|
|
#include <asm/arch/hardware.h>
|
|
#include <asm/arch/spr_defs.h>
|
|
#include <asm/arch/spr_misc.h>
|
|
|
|
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
|
|
int board_init(void)
|
|
{
|
|
return spear_board_init(MACH_TYPE_SPEAR310);
|
|
}
|
|
|
|
/*
|
|
* board_nand_init - Board specific NAND initialization
|
|
* @nand: mtd private chip structure
|
|
*
|
|
* Called by nand_init_chip to initialize the board specific functions
|
|
*/
|
|
|
|
void board_nand_init()
|
|
{
|
|
struct misc_regs *const misc_regs_p =
|
|
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
|
|
struct nand_chip *nand = &nand_chip[0];
|
|
|
|
#if defined(CONFIG_NAND_FSMC)
|
|
if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
|
|
MISC_SOCCFG30) ||
|
|
((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
|
|
MISC_SOCCFG31)) {
|
|
|
|
fsmc_nand_init(nand);
|
|
}
|
|
#endif
|
|
return;
|
|
}
|
|
|
|
int board_eth_init(bd_t *bis)
|
|
{
|
|
int ret = 0;
|
|
|
|
#if defined(CONFIG_DESIGNWARE_ETH)
|
|
u32 interface = PHY_INTERFACE_MODE_MII;
|
|
if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
|
|
ret++;
|
|
#endif
|
|
#if defined(CONFIG_MACB)
|
|
if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE,
|
|
CONFIG_MACB0_PHY) >= 0)
|
|
ret++;
|
|
|
|
if (macb_eth_initialize(1, (void *)CONFIG_SYS_MACB1_BASE,
|
|
CONFIG_MACB1_PHY) >= 0)
|
|
ret++;
|
|
|
|
if (macb_eth_initialize(2, (void *)CONFIG_SYS_MACB2_BASE,
|
|
CONFIG_MACB2_PHY) >= 0)
|
|
ret++;
|
|
|
|
if (macb_eth_initialize(3, (void *)CONFIG_SYS_MACB3_BASE,
|
|
CONFIG_MACB3_PHY) >= 0)
|
|
ret++;
|
|
#endif
|
|
return ret;
|
|
}
|