Ye.Li 9293d7fd50 imx: mx6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD reset ... Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source, do not reset this PFD to avoid system hang. Customers may set this in DDR script or use BT_FREQ to select low freq boot. Signed-off-by: Ye.Li <B37916@freescale.com>		2014-09-29 10:24:07 +02:00
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clock.c	imx: Support i.MX6 High Assurance Boot authentication	2014-09-22 16:21:04 +02:00
ddr.c	arm: mx6: ddr: fix cs0_end calculation	2014-09-09 15:35:00 +02:00
hab.c	imx: Support i.MX6 High Assurance Boot authentication	2014-09-22 16:21:04 +02:00
Makefile	mx6: add support of multi-processor command	2014-08-20 11:52:54 +02:00
mp.c	mx6: add support of multi-processor command	2014-08-20 11:52:54 +02:00
soc.c	imx: mx6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD reset	2014-09-29 10:24:07 +02:00