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https://github.com/brain-hackers/u-boot-brain
synced 2024-10-01 00:50:43 +09:00
9238b52abd
Synchronise the config options with Cyclone V SoCDK and other boards. This enables ethernet on the ArriaV SoCDK. Signed-off-by: Marek Vasut <marex@denx.de>
27 lines
622 B
Plaintext
27 lines
622 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_TARGET_SOCFPGA_ARRIA5=y
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CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_SPI_FLASH=y
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CONFIG_DM_ETH=y
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CONFIG_NETDEVICES=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_DM_GPIO=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_DM_SEQ_ALIAS=y
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CONFIG_SPL_SIMPLE_BUS=y
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CONFIG_DM_SPI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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