mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-08 12:16:16 +09:00
5bc60d5a44
Move to driver model for RTC, USB and ETH on coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
27 lines
553 B
Plaintext
27 lines
553 B
Plaintext
CONFIG_X86=y
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CONFIG_VENDOR_COREBOOT=y
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CONFIG_TARGET_COREBOOT=y
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CONFIG_TSC_CALIBRATION_BYPASS=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_CMD_TPM=y
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CONFIG_CMD_TPM_TEST=y
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CONFIG_OF_CONTROL=y
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CONFIG_DM_PCI=y
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CONFIG_SPI_FLASH=y
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CONFIG_DM_ETH=y
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CONFIG_E1000=y
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CONFIG_DM_TPM=y
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CONFIG_TPM_TIS_LPC=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_DM_RTC=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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CONFIG_SYS_VSNPRINTF=y
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CONFIG_TPM=y
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