mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 13:16:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
131 lines
2.7 KiB
C
131 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/io.h>
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#include <common.h>
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#include <linux/sizes.h>
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#include <mmc.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include "../common/pfuze.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static iomux_v3_cfg_t const wdog_pads[] = {
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MX6_PAD_WDOG_B__WDOG1_B | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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#ifdef CONFIG_DM_PMIC_PFUZE100
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int power_init_board(void)
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{
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struct udevice *dev;
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int ret;
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u32 dev_id, rev_id, i;
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u32 switch_num = 6;
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u32 offset = PFUZE100_SW1CMODE;
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ret = pmic_get("pfuze100", &dev);
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if (ret == -ENODEV)
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return 0;
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if (ret != 0)
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return ret;
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dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
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rev_id = pmic_reg_read(dev, PFUZE100_REVID);
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printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
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/* Init mode to APS_PFM */
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pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM);
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for (i = 0; i < switch_num - 1; i++)
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pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);
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/* set SW1AB staby volatage 0.975V */
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pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b);
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/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40);
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/* set SW1C staby volatage 0.975V */
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pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x1b);
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/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
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pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40);
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return 0;
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}
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#endif
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX6SLL EVK\n");
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return 0;
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}
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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int mmc_map_to_kernel_blk(int devno)
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{
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return devno;
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}
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