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https://github.com/brain-hackers/u-boot-brain
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91ee54741e
The SELI8 design is a new tdm service unit card for Hitachi-Powergrids XMC and FOX product lines. It is based on NXP LS1021 SoC and it provides following interfaces: - IFC interface for NOR, NAND and external FPGA's - 1 x RGMII ETH for debug purposes - 2 x SGMII ETH for management communication via back-plane - 1 x uQE HDLC for management communication via back-plane - 1 x I2C for peripheral devices - 1 x SPI for peripheral devices - 1 x UART for debug logging It is foreseen that the design will be later re-used for another XMC and FOX service cards with similar SoC requirements. Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com> Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
12 lines
415 B
Makefile
12 lines
415 B
Makefile
#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright 2021 Hitachi Power Grids. All rights reserved.
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#
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obj-y += pg-wcom-ls102xa.o ddr.o
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obj-y += ../common/common.o ../common/ivm.o ../common/qrio.o
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obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ../../freescale/common/ns_access.o
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obj-$(CONFIG_LS102XA_STREAM_ID) += ../../freescale/common/ls102xa_stream_id.o
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obj-$(CONFIG_ID_EEPROM) += ../../freescale/common/sys_eeprom.o
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