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https://github.com/brain-hackers/u-boot-brain
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726e90aacf
The soc node of the mpc52xx needs to be loaded with the IPB bus frequency, not the XLB frequency. This patch depends on the previous patches for MPC52xx device tree support Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
132 lines
3.0 KiB
C
132 lines
3.0 KiB
C
/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code for the MPC5xxx CPUs
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <mpc5xxx.h>
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#include <asm/processor.h>
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#if defined(CONFIG_OF_FLAT_TREE)
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#include <ft_build.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu (void)
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{
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ulong clock = gd->cpu_clk;
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char buf[32];
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#ifndef CONFIG_MGT5100
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uint svr, pvr;
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#endif
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puts ("CPU: ");
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#ifdef CONFIG_MGT5100
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puts (CPU_ID_STR);
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printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
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#else
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svr = get_svr();
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pvr = get_pvr();
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switch (SVR_VER (svr)) {
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case SVR_MPC5200:
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printf ("MPC5200");
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break;
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default:
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printf ("MPC52?? (SVR %08x)", svr);
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break;
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}
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printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
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PVR_MAJ(pvr), PVR_MIN(pvr));
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#endif
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printf (" at %s MHz\n", strmhz (buf, clock));
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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int
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do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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ulong msr;
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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/* Charge the watchdog timer */
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*(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
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*(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
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while(1);
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return 1;
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Get timebase clock frequency (like cpu_clk in Hz)
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*
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*/
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unsigned long get_tbclk (void)
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{
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ulong tbclk;
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tbclk = (gd->bus_clk + 3L) / 4L;
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return (tbclk);
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}
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/* ------------------------------------------------------------------------- */
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#ifdef CONFIG_OF_FLAT_TREE
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void
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ft_cpu_setup(void *blob, bd_t *bd)
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{
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u32 *p;
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int len;
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/* Core XLB bus frequency */
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p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len);
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if (p != NULL)
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*p = cpu_to_be32(bd->bi_busfreq);
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/* SOC peripherals use the IPB bus frequency */
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p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len);
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if (p != NULL)
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*p = cpu_to_be32(bd->bi_ipbfreq);
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enetaddr, 6);
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}
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#endif
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