mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-13 00:03:26 +09:00
![Ley Foon Tan](/assets/img/avatar_default.png)
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz. Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
22 lines
578 B
C
22 lines
578 B
C
/* SPDX-License-Identifier: GPL-2.0
|
|
*
|
|
* Copyright (C) 2016-2019 Intel Corporation <www.intel.com>
|
|
*
|
|
*/
|
|
|
|
#ifndef _CLOCK_MANAGER_SOC64_
|
|
#define _CLOCK_MANAGER_SOC64_
|
|
|
|
const unsigned int cm_get_osc_clk_hz(void);
|
|
const unsigned int cm_get_f2s_per_ref_clk_hz(void);
|
|
const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
|
|
const unsigned int cm_get_intosc_clk_hz(void);
|
|
const unsigned int cm_get_fpga_clk_hz(void);
|
|
|
|
#define CLKMGR_INTOSC_HZ 400000000
|
|
|
|
/* Clock configuration accessors */
|
|
const struct cm_config * const cm_get_default_config(void);
|
|
|
|
#endif /* _CLOCK_MANAGER_SOC64_ */
|