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![Jan Kiszka](/assets/img/avatar_default.png)
Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
31 lines
732 B
C
31 lines
732 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* K3: Architecture common definitions
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <asm/armv7_mpu.h>
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#define AM65X 0xbb5a
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#define J721E 0xbb64
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#define REV_PG1_0 0
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#define REV_PG2_0 1
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struct fwl_data {
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const char *name;
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u16 fwl_id;
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u16 regions;
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};
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void setup_k3_mpu_regions(void);
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int early_console_init(void);
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void disable_linefill_optimization(void);
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void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
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void start_non_linux_remote_cores(void);
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int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
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void k3_sysfw_print_ver(void);
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void spl_enable_dcache(void);
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