mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
25ddd1fb0a
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
270 lines
8.9 KiB
C
270 lines
8.9 KiB
C
/*
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* U-boot - Configuration file for Cirrus Logic EDB93xx boards
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#ifdef CONFIG_edb9301
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#define CONFIG_EDB9301
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#elif defined(CONFIG_edb9302)
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#define CONFIG_EDB9302
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#elif defined(CONFIG_edb9302a)
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#define CONFIG_EDB9302A
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#elif defined(CONFIG_edb9307)
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#define CONFIG_EDB9307
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#elif defined(CONFIG_edb9307a)
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#define CONFIG_EDB9307A
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#elif defined(CONFIG_edb9312)
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#define CONFIG_EDB9312
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#elif defined(CONFIG_edb9315)
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#define CONFIG_EDB9315
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#elif defined(CONFIG_edb9315a)
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#define CONFIG_EDB9315A
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#else
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#error "no board defined"
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#endif
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/* Initial environment and monitor configuration options. */
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#define CONFIG_BOOTDELAY 2
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#define CONFIG_CMDLINE_TAG 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_BOOTARGS "root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
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#define CONFIG_BOOTFILE "edb93xx.img"
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#define CONFIG_SYS_HUSH_PARSER 1
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#ifdef CONFIG_EDB9301
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#define CONFIG_EP9301
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9301
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#define CONFIG_SYS_PROMPT "EDB9301> "
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#elif defined(CONFIG_EDB9302)
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#define CONFIG_EP9302
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9302
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#define CONFIG_SYS_PROMPT "EDB9302> "
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#elif defined(CONFIG_EDB9302A)
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#define CONFIG_EP9302
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9302A
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#define CONFIG_SYS_PROMPT "EDB9302A> "
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#elif defined(CONFIG_EDB9307)
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#define CONFIG_EP9307
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9307
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#define CONFIG_SYS_PROMPT "EDB9307> "
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#define CONFIG_ENV_SECT_SIZE 0x00040000
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#elif defined(CONFIG_EDB9307A)
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#define CONFIG_EP9307
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9307A
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#define CONFIG_SYS_PROMPT "EDB9307A> "
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#define CONFIG_ENV_SECT_SIZE 0x00040000
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#elif defined(CONFIG_EDB9312)
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#define CONFIG_EP9312
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9312
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#define CONFIG_SYS_PROMPT "EDB9312> "
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#define CONFIG_ENV_SECT_SIZE 0x00040000
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#elif defined(CONFIG_EDB9315)
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#define CONFIG_EP9315
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9315
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#define CONFIG_SYS_PROMPT "EDB9315> "
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#define CONFIG_ENV_SECT_SIZE 0x00040000
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#elif defined(CONFIG_EDB9315A)
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#define CONFIG_EP9315
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#define CONFIG_MACH_TYPE MACH_TYPE_EDB9315A
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#define CONFIG_SYS_PROMPT "EDB9315A> "
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#define CONFIG_ENV_SECT_SIZE 0x00040000
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#else
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#error "no board defined"
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#endif
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/* High-level configuration options */
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#define CONFIG_ARM920T 1 /* This is an ARM920T core... */
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#define CONFIG_EP93XX 1 /* in a Cirrus Logic 93xx SoC */
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#define CONFIG_SYS_CLK_FREQ 14745600 /* EP93xx has a 14.7456 clock */
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#define CONFIG_SYS_HZ 1000 /* decr freq: 1 ms ticks */
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#undef CONFIG_USE_IRQ /* Don't need IRQ/FIQ */
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/* Monitor configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_SETGETDCR
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#undef CONFIG_CMD_XIMG
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#undef CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_JFFS2
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#define CONFIG_SYS_LONGHELP /* Enable "long" help in mon */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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/* Print buffer size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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/* Boot argument buffer size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
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/* Serial port hardware configuration */
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#define CONFIG_PL010_SERIAL
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
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#define CONFIG_SYS_SERIAL0 0x808C0000
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#define CONFIG_SYS_SERIAL1 0x808D0000
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1}
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/* Status LED */
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#define CONFIG_STATUS_LED 1 /* Status LED enabled */
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#define CONFIG_BOARD_SPECIFIC_LED 1
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#define STATUS_LED_GREEN 0
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#define STATUS_LED_RED 1
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/* Green */
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#define STATUS_LED_BIT STATUS_LED_GREEN
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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/* Red */
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#define STATUS_LED_BIT1 STATUS_LED_RED
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#define STATUS_LED_STATE1 STATUS_LED_OFF
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#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
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/* Optional value */
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#define STATUS_LED_BOOT STATUS_LED_BIT
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/* Network hardware configuration */
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#define CONFIG_DRIVER_EP93XX_MAC
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#define CONFIG_MII_SUPPRESS_PREAMBLE
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#define CONFIG_MII
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#define CONFIG_PHY_ADDR 1
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#define CONFIG_NET_MULTI
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#undef CONFIG_NETCONSOLE
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/* SDRAM configuration */
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#if defined(CONFIG_EDB9301) || defined(CONFIG_EDB9302)
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/*
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* EDB9301/2 has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
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* 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
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* the SROMLL bit on the processor, resulting in this non-contiguous memory map.
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*/
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#define CONFIG_NR_DRAM_BANKS 4
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#define PHYS_SDRAM_1 0x00000000
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#define PHYS_SDRAM_SIZE_1 0x00800000
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#define PHYS_SDRAM_2 0x01000000
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#define PHYS_SDRAM_SIZE_2 0x00800000
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#define PHYS_SDRAM_3 0x04000000
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#define PHYS_SDRAM_SIZE_3 0x00800000
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#define PHYS_SDRAM_4 0x05000000
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#define PHYS_SDRAM_SIZE_4 0x00800000
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#define CONFIG_EDB93XX_SDCS3
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#define CONFIG_SYS_MEMTEST_START 0x00100000
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#define CONFIG_SYS_MEMTEST_END 0x007fffff
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#elif defined(CONFIG_EDB9302A)
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/*
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* EDB9302a has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75
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* 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set
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* the SROMLL bit on the processor, resulting in this non-contiguous memory map.
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*/
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#define CONFIG_NR_DRAM_BANKS 4
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#define PHYS_SDRAM_1 0xc0000000
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#define PHYS_SDRAM_SIZE_1 0x00800000
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#define PHYS_SDRAM_2 0xc1000000
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#define PHYS_SDRAM_SIZE_2 0x00800000
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#define PHYS_SDRAM_3 0xc4000000
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#define PHYS_SDRAM_SIZE_3 0x00800000
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#define PHYS_SDRAM_4 0xc5000000
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#define PHYS_SDRAM_SIZE_4 0x00800000
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#define CONFIG_EDB93XX_SDCS0
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#define CONFIG_SYS_MEMTEST_START 0xc0100000
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#define CONFIG_SYS_MEMTEST_END 0xc07fffff
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#elif defined(CONFIG_EDB9307) || defined CONFIG_EDB9312 || \
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defined(CONFIG_EDB9315)
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/*
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* The EDB9307, EDB9312, and EDB9315 have 2 banks of SDRAM consisting of
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* 2x Samsung K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of
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* 64 MB of SDRAM.
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*/
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 0x00000000
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#define PHYS_SDRAM_SIZE_1 0x02000000
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#define PHYS_SDRAM_2 0x04000000
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#define PHYS_SDRAM_SIZE_2 0x02000000
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#define CONFIG_EDB93XX_SDCS3
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#define CONFIG_SYS_MEMTEST_START 0x00100000
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#define CONFIG_SYS_MEMTEST_END 0x01e00000
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#elif defined(CONFIG_EDB9307A) || defined(CONFIG_EDB9315A)
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/*
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* The EDB9307A and EDB9315A have 2 banks of SDRAM consisting of 2x Samsung
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* K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of 64 MB of SDRAM.
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*/
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 0xc0000000
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#define PHYS_SDRAM_SIZE_1 0x02000000
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#define PHYS_SDRAM_2 0xc4000000
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#define PHYS_SDRAM_SIZE_2 0x02000000
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#define CONFIG_EDB93XX_SDCS0
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#define CONFIG_SYS_MEMTEST_START 0xc0100000
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#define CONFIG_SYS_MEMTEST_END 0xc1e00000
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#endif
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/* Default load address */
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#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x01000000)
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/* Must match kernel config */
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#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
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/* Run-time memory allocatons */
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#define CONFIG_STACKSIZE (128 * 1024)
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#if defined(CONFIG_USE_IRQ)
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#define CONFIG_STACKSIZE_IRQ (4 * 1024)
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#define CONFIG_STACKSIZE_FIQ (4 * 1024)
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#endif
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
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/* -----------------------------------------------------------------------------
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* FLASH and environment organization
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*
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* The EDB9301 and EDB9302(a) have 1 bank of flash memory at 0x60000000
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* consisting of 1x Intel TE28F128J3C-150 128 Mbit flash on a 16-bit data bus,
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* for a total of 16 MB of CFI-compatible flash.
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*
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* The EDB9307(a), EDB9312, and EDB9315(a) have 1 bank of flash memory at
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* 0x60000000 consisting of 2x Micron MT28F128J3-12 128 Mbit flash on a 32-bit
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* data bus, for a total of 32 MB of CFI-compatible flash.
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*
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* EDB9301/02(a) EDB9307(a)/12/15(a)
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* 0x60000000 - 0x0003FFFF u-boot u-boot
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* 0x60040000 - 0x0005FFFF environment #1 environment #1
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* 0x60060000 - 0x0007FFFF environment #2 environment #1 (continued)
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* 0x60080000 - 0x0009FFFF unused environment #2
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* 0x600A0000 - 0x000BFFFF unused environment #2 (continued)
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* 0x600C0000 - 0x00FFFFFF unused unused
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* 0x61000000 - 0x01FFFFFF not present unused
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define PHYS_FLASH_1 0x60000000
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#define CONFIG_SYS_FLASH_BASE (PHYS_FLASH_1)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_ENV_OVERWRITE /* Vendor params unprotected */
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR 0x60040000
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#endif /* !defined (__CONFIG_H) */
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