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![Konstantin Porotchkin](/assets/img/avatar_default.png)
Bypass XHCI and AHCi board configuration flow on ESPRESSOBin community board. The community board does not have i2c expander and USB VBUS is always on, so the scan for AHCi and USB devices can be faster without unneded configurations. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
259 lines
6.9 KiB
C
259 lines
6.9 KiB
C
/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <i2c.h>
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#include <phy.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* IO expander I2C device */
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#define I2C_IO_EXP_ADDR 0x22
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#define I2C_IO_CFG_REG_0 0x6
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#define I2C_IO_DATA_OUT_REG_0 0x2
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#define I2C_IO_REG_0_SATA_OFF 2
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#define I2C_IO_REG_0_USB_H_OFF 1
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/* The pin control values are the same for DB and Espressobin */
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#define PINCTRL_NB_REG_VALUE 0x000173fa
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#define PINCTRL_SB_REG_VALUE 0x00007a23
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/* Ethernet switch registers */
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/* SMI addresses for multi-chip mode */
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#define MVEBU_PORT_CTRL_SMI_ADDR(p) (16 + (p))
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#define MVEBU_SW_G2_SMI_ADDR (28)
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/* Multi-chip mode */
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#define MVEBU_SW_SMI_DATA_REG (1)
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#define MVEBU_SW_SMI_CMD_REG (0)
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#define SW_SMI_CMD_REG_ADDR_OFF 0
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#define SW_SMI_CMD_DEV_ADDR_OFF 5
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#define SW_SMI_CMD_SMI_OP_OFF 10
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#define SW_SMI_CMD_SMI_MODE_OFF 12
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#define SW_SMI_CMD_SMI_BUSY_OFF 15
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/* Single-chip mode */
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/* Switch Port Registers */
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#define MVEBU_SW_LINK_CTRL_REG (1)
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#define MVEBU_SW_PORT_CTRL_REG (4)
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/* Global 2 Registers */
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#define MVEBU_G2_SMI_PHY_CMD_REG (24)
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#define MVEBU_G2_SMI_PHY_DATA_REG (25)
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int board_early_init_f(void)
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{
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const void *blob = gd->fdt_blob;
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const char *bank_name;
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const char *compat = "marvell,armada-3700-pinctl";
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int off, len;
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void __iomem *addr;
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/* FIXME
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* Temporary WA for setting correct pin control values
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* until the real pin control driver is awailable.
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*/
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off = fdt_node_offset_by_compatible(blob, -1, compat);
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while (off != -FDT_ERR_NOTFOUND) {
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bank_name = fdt_getprop(blob, off, "bank-name", &len);
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addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
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blob, off, "reg", 0, NULL, true);
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if (!strncmp(bank_name, "armada-3700-nb", len))
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writel(PINCTRL_NB_REG_VALUE, addr);
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else if (!strncmp(bank_name, "armada-3700-sb", len))
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writel(PINCTRL_SB_REG_VALUE, addr);
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off = fdt_node_offset_by_compatible(blob, off, compat);
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}
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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/* Board specific AHCI / SATA enable code */
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int board_ahci_enable(void)
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{
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struct udevice *dev;
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int ret;
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u8 buf[8];
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/* Only DB requres this configuration */
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if (!of_machine_is_compatible("marvell,armada-3720-db"))
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return 0;
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/* Configure IO exander PCA9555: 7bit address 0x22 */
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ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
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if (ret) {
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printf("Cannot find PCA9555: %d\n", ret);
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return 0;
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}
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ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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/*
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* Enable SATA power via IO expander connected via I2C by setting
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* the corresponding bit to output mode to enable power for SATA
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*/
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buf[0] &= ~(1 << I2C_IO_REG_0_SATA_OFF);
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ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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return 0;
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}
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/* Board specific xHCI enable code */
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int board_xhci_enable(void)
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{
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struct udevice *dev;
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int ret;
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u8 buf[8];
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/* Only DB requres this configuration */
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if (!of_machine_is_compatible("marvell,armada-3720-db"))
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return 0;
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/* Configure IO exander PCA9555: 7bit address 0x22 */
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ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
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if (ret) {
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printf("Cannot find PCA9555: %d\n", ret);
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return 0;
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}
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printf("Enable USB VBUS\n");
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/*
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* Read configuration (direction) and set VBUS pin as output
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* (reset pin = output)
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*/
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ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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/* Read VBUS output value and disable it */
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ret = dm_i2c_read(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to read IO expander value via I2C\n");
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return -EIO;
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}
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buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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/*
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* Required delay for configuration to settle - must wait for
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* power on port is disabled in case VBUS signal was high,
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* required 3 seconds delay to let VBUS signal fully settle down
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*/
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mdelay(3000);
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/* Enable VBUS power: Set output value of VBUS pin as enabled */
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buf[0] |= (1 << I2C_IO_REG_0_USB_H_OFF);
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ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
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if (ret) {
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printf("Failed to set IO expander via I2C\n");
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return -EIO;
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}
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mdelay(500); /* required delay to let output value settle */
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return 0;
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}
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/* Helper function for accessing switch devices in multi-chip connection mode */
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static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
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int smi_addr, int reg, u16 value)
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{
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u16 smi_cmd = 0;
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if (bus->write(bus, dev_smi_addr, 0,
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MVEBU_SW_SMI_DATA_REG, value) != 0) {
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printf("Error writing to the PHY addr=%02x reg=%02x\n",
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smi_addr, reg);
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return -EFAULT;
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}
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smi_cmd = (1 << SW_SMI_CMD_SMI_BUSY_OFF) |
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(1 << SW_SMI_CMD_SMI_MODE_OFF) |
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(1 << SW_SMI_CMD_SMI_OP_OFF) |
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(smi_addr << SW_SMI_CMD_DEV_ADDR_OFF) |
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(reg << SW_SMI_CMD_REG_ADDR_OFF);
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if (bus->write(bus, dev_smi_addr, 0,
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MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
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printf("Error writing to the PHY addr=%02x reg=%02x\n",
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smi_addr, reg);
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return -EFAULT;
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}
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return 0;
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}
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/* Bring-up board-specific network stuff */
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int board_network_enable(struct mii_dev *bus)
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{
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if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
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return 0;
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/*
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* FIXME: remove this code once Topaz driver gets available
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* A3720 Community Board Only
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* Configure Topaz switch (88E6341)
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* Set port 0,1,2,3 to forwarding Mode (through Switch Port registers)
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*/
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
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MVEBU_SW_PORT_CTRL_REG, 0x7f);
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
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MVEBU_SW_PORT_CTRL_REG, 0x7f);
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(2),
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MVEBU_SW_PORT_CTRL_REG, 0x7f);
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(3),
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MVEBU_SW_PORT_CTRL_REG, 0x7f);
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/* RGMII Delay on Port 0 (CPU port), force link to 1000Mbps */
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mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
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MVEBU_SW_LINK_CTRL_REG, 0xe002);
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/* Power up PHY 1, 2, 3 (through Global 2 registers) */
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mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
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MVEBU_G2_SMI_PHY_DATA_REG, 0x1140);
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mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
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MVEBU_G2_SMI_PHY_CMD_REG, 0x9620);
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mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
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MVEBU_G2_SMI_PHY_CMD_REG, 0x9640);
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mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
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MVEBU_G2_SMI_PHY_CMD_REG, 0x9660);
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return 0;
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}
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